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2. GPIO

If the related bit is set to be 1, the IO output is low level (at the same time, users should

enable the output). Bit[15:0] contains 16 GPIO output statuses.

•

Output high level register GPIO_OUT_W1TS

bit[15:0] output high level bit (write only register):

If the related bit is set to be 1, it means the IO output is high level (at the same time, users

should enable the output). Bit[15:0] contains 16 GPIO output statuses.

•

Output status register GPIO_OUT

bit[15:0] output status bit (read/write register):

Value of bit[15:0] of this register shows the related pin output status.

Bit[15:0] of GPIO_OUT is decided by bit[15:0] of GPIO_OUT_W1TS and bit[15:0] of

GPIO_OUT_W1TC. For example, when bit[1] of GPIO_OUT_W1TS =1, then GPIO_OUT[1]

=1; when bit[2] of GPIO_OUT_W1TC = 1, then GPIO_OUT[2]=0.

2.2.3. GPIO Input Register

bit[15:0] the input status bit (readable and writable):

If the related bit is set to be 1, the IO pin status is high level. If the related bit is set to be 0,

the IO pin status is low level. Bit[15:0] contains 16 GPIO input status bits.

2.2.4. GPIO Interrupt Registers

•

Interrupt type register GPIO_PIN12 (this register differs for different GPIOs)

bit[9:7] (readable and writable):

0: the GPIO interrupt is disabled

1: rising edge triggered interrupt

2: falling edge triggered interrupt

3: double-edge triggered interrupt

4: low level

5: high level

! Note:

If users need to set the pin to high level, they need to conﬁgure the GPIO_OUT_W1T register.

! Note:

If users need to set the pin to low level, they need to conﬁgure the GPIO_OUT_W1TC register.

! Note:

The GPIO input detection function is enabled by default.

Espressif

! /!

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2017.05

ESP8266 Datasheet(PDF) 16 Page - ESPRESSIF SYSTEMS (SHANGHAI) CO., LTD.