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A4964 Datasheet(PDF) 72 Page - Allegro MicroSystems

Part # A4964
Description  Sensorless Sinusoidal Drive BLDC Controller
PDF  92 Pages
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Manufacturer  ALLEGRO [Allegro MicroSystems]
Direct Link  http://www.allegromicro.com
Logo ALLEGRO - Allegro MicroSystems

A4964 Datasheet(HTML) 72 Page - Allegro MicroSystems

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Sensorless Sinusoidal Drive BLDC Controller
A4964
72
Allegro MicroSystems, LLC
955 Perimeter Road
Manchester, NH 03103-3353 U.S.A.
www.allegromicro.com
Serial Register Reference
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
24: NVM Write
1
1
0
0
0
WR
SAV1 SAV0
P
0
0
0
0
0
0
0
0
0
25: System
1
1
0
0
1
WR
ESF
VLR
VRG OPM LWK
IPI
DIL
CM1
CM0
P
1
0
1
0
0
0
0
0
0
Register 24: Write NVM Control
SAV[1:0] Save Parameters to Non-Volatile Memory (NVM)
When SAV[1:0] is changed from 01 to 10, the present con-
tents of registers 0 to 23, 25 to 29, and bits [10:3] of register
30 (DI[9:2]) will be written to NVM.
When the NVM save has completed successfully, SAV[1:0]
will be set to 01 and can be read to verify completion of the
write. If SAV[1:0] is reset to 00, the save has not completed
successfully.
Register 25: System Configuration
ESF
Enable Stop On Fail Select
ESF
Stop on Fail
Default
0
No stop on fail
1
Stop on fail
D
VLR
Logic Regulator Voltage
VLR
Logic Regulator Voltage
Default
0
3.3 V
D
1
5 V
VRG
Gate Drive Regulator Voltage
VRG
Gate Drive Regulator Voltage
Default
0
8 V
1
11 V
D
Register 25: System Configuration (continued)
OPM
Operating Mode Select
OPM
Operating Mode
Default
0
SPI only
D
1
Stand-alone with SPI
LWK
Wake Mode Select
LWK
Wake Mode
Default
0
PWM Wake Mode
D
1
LIN Wake Mode
IPI
PWM Input Sense (when OPM = 1)
IPI
PWM Sense
Default
0
True, Active high
D
1
Inverted, Active low
DIL
Disable Current Limit (Speed Modes)
DIL
Current Limit
Default
0
Enabled
D
1
Disabled
CM[1:0]
Selects Motor Control Mode
CM1
CM0
Motor Control Mode
Default
0
0
Closed-loop speed
D
0
1
Closed-loop speed
1
0
Closed-loop current
1
1
Open-loop speed



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