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A4964 Datasheet(PDF) 22 Page - Allegro MicroSystems

Part # A4964
Description  Sensorless Sinusoidal Drive BLDC Controller
PDF  92 Pages
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Manufacturer  ALLEGRO [Allegro MicroSystems]
Direct Link  http://www.allegromicro.com
Logo ALLEGRO - Allegro MicroSystems

A4964 Datasheet(HTML) 22 Page - Allegro MicroSystems

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Sensorless Sinusoidal Drive BLDC Controller
A4964
22
Allegro MicroSystems, LLC
955 Perimeter Road
Manchester, NH 03103-3353 U.S.A.
www.allegromicro.com
FUNCTIONAL DESCRIPTION
The A4964 is a three-phase, sensorless, brushless DC (BLDC)
motor controller for use with external N-channel power MOS-
FETs and is specifically designed for automotive applications.
The motor is driven using 3-phase sinusoidal current drive,
where phase commutation is determined by a proprietary, motor
back-emf (bemf) sensing technique. The motor bemf is sensed
to determine the rotor position without the need for indepen-
dent position sensors. An integrated sensorless startup scheme
includes forwards and reverse pre-rotation (windmill) detection
and syncronization and allows a wide range of motor and load
combinations.
Motor current is provided by six external power N-channel
MOSFETs arranged as a three phase bridge. The A4964 provides
six high current gate drives, three high-side and three low-side,
capable of driving a wide range of MOSFETs. The maximum
MOSFET drive voltage is internally limited under all supply
conditions to protect the MOSFET from excessive gate-source
voltage without the need for an external clamp circuit. The A4964
provides all the necessary circuits to ensure that the gate-source
voltage of both high-side and low-side external MOSFETs are
sufficiently high to achieve full correct conduction at low supply
levels. A low-power sleep state allows the A4964, the power
bridge, and the load to remain connected to a vehicle battery sup-
ply without the need for an additional supply switch.
Three motor control modes are available: closed-loop speed
control, open-loop speed (voltage) control, and current (torque)
control. The motor control mode and the control and configura-
tion parameters can be altered through an SPI-compatible serial
interface and the user-defined power-up parameters can be stored
in non-volatile memory. The A4964 can also operate in a stand-
alone mode, without the need for an external microcontroller,
where the duty cycle of a PWM signal applied to the LIN termi-
nal is used to control the output of the motor.
Startup (inrush) current, and peak motor current is limited by an
integrated fixed frequency PWM current limiter. The maximum
current limit is set by a single external sense resistor and the
active current limit can be modified through the serial interface.
An integrated data acquisition system provides measurement of
the motor voltage, the chip temperature, the motor speed, and an
estimate of the average supply current.
Integrated diagnostics provide indication of undervoltage,
overtemperature, and power bridge faults, and can be configured
to protect the power FETs under most short-circuit conditions.
Detailed diagnostics are available through the serial interface.
Specific functions are described more fully in following sections.
Input and Output Terminal Functions
VBB. Main power supply for internal regulators and charge
pump. The main power supply should be connected to VBB
through a reverse voltage protection circuit and should be
decoupled with ceramic capacitors connected close to the supply
and ground terminals.
VBRG. Sense input to the top of the external MOSFET bridge.
Allows accurate measurement of the voltage at the drain of the
high-side MOSFETs in the bridge.
CP1, CP2. Pump capacitor connections for charge pump. Con-
nect a 470 nF ceramic capacitor between CP1 and CP2.
VREG. Regulated voltage, nominally 11 V, used to supply the
low-side gate drivers and to charge the bootstrap capacitors. A
sufficiently large storage capacitor must be connected to this
terminal to provide the transient charging current.
VLR. VLR regulator output. External logic can be powered by
this node. The voltage can be selected as 3.3 or 5 V. A ceramic
capacitor of at least 1 µF with an ESR of no more than 250 mΩ
should be fitted between the VLR output and GND to ensure
stability.
GND. Analog reference, digital and power ground. Connect to
supply ground—see layout recommendations.
CA, CB, CC. High-side connections for the bootstrap capacitors
and positive supply for high-side gate drivers.
GHA, GHB, GHC. High-side gate-drive outputs for external
N-channel MOSFETs.
SA, SB, SC. Motor phase connections. These terminals sense
the voltages switched across the load. They are also connected to
the negative side of the bootstrap capacitors and are the negative
supply connections for the floating high-side drivers.
GLA, GLB, GLC. Low-side gate-drive outputs for external
N-channel MOSFETs.
CSP, CSM. Differential current sense amplifier inputs. Con-
nect directly to each end of the sense resistor using separate PCB
traces.



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