GD25Q257DFJR datasheet(32/99 Pages) GIGADEVICE

Part #	GD25Q257DFJR

Description	3.3V Uniform Sector Dual and Quad Serial Flash

PDF	99 Pages

Scroll/Zoom	100%

Manufacturer	GIGADEVICE [GigaDevice Semiconductor (Beijing) Inc.]

Direct Link	http://www.gigadevice.com/

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32 / 99 page

3.3V Uniform Sector

Dual and Quad Serial Flash

GD25Q257D

8.11.

Quad Output Fast Read (QOFR 6BH or 4QOFR 6CH)

The Quad Output Fast Read command is followed by 3-Byte address (A23-A0) and a dummy Byte, and each bit being

latched in on the rising edge of SCLK, then the memory contents are shifted out 4-bit per clock cycle from IO3, IO2, IO1

and IO0. The command sequence is shown in followed Figure21. The first Byte addressed can be at any location. The

address is automatically incremented to the next higher address after each Byte of data is shifted out.

Figure 21. Quad Output Fast Read Sequence Diagram (ADS=0)

Command

6BH

CS#

SCLK

SI(IO0)

SO(IO1)

High-Z

9 10

28 29 30 31

23 22 21

24-bit address

34 35 36 37

38 39

Byte1

42 43 44 45

46 47

Dummy Clocks

WP#(IO2)

High-Z

HOLD#(IO3)

High-Z

CS#

SCLK

SI(IO0)

SO(IO1)

WP#(IO2)

HOLD#(IO3)

Byte2 Byte3 Byte4

GD25Q257DFJR Datasheet(PDF) 32 Page - GigaDevice Semiconductor (Beijing) Inc.