GD25Q257DFJR datasheet(49/99 Pages) GIGADEVICE

49 / 99 page

3.3V Uniform Sector

Dual and Quad Serial Flash

GD25Q257D

8.18.

Quad Page Program (QPP 32H or 4QPP 34H)

The Quad Page Program command is for programming the memory using four pins: IO0, IO1, IO2, and IO3. To use

Quad Page Program the Quad enable in status register Bit9 must be set (QE=1). A Write Enable (WREN) command must

previously have been executed to set the Write Enable Latch (WEL) bit before sending the Page Program command. The

quad Page Program command is entered by driving CS# Low, followed by the command code (32H), three address Bytes

and at least one data Byte on IO pins.

The command sequence is shown below. If more than 256 Bytes are sent to the device, previously latched data are

discarded and the last 256 data Bytes are guaranteed to be programmed correctly within the same page. If less than 256

data Bytes are sent to device, they are correctly programmed at the requested addresses without having any effects on the

other Bytes of the same page. CS# must be driven high after the eighth bit of the last data Byte has been latched in;

otherwise the Quad Page Program (PP) command is not executed.

As soon as CS# is driven high, the self-timed Quad Page Program cycle (whose duration is tPP) is initiated. While the

Quad Page Program cycle is in progress, the Status Register may be read to check the value of the Write In Progress (WIP)

bit. The Write in Progress (WIP) bit is 1 during the self-timed Quad Page Program cycle, and is 0 when it is completed. At

some unspecified time before the cycle is completed, the Write Enable Latch (WEL) bit is reset.

A Quad Page Program command applied to a page which is protected by the Block Protect (TB, BP3, BP2, BP1, and

BP0) is not executed.

When ECC is enabled (ECC=1 in Extended Register), Page Program instruction must program minimum aligned 8-

Byte (A[1:0]=0,0) data or multiple of aligned 8-Byte data granularities, up to the 256-Byte page. Every aligned 8-Byte

memory can only be programmed once before any Erase operation at that address.

GD25Q257DFJR Datasheet(PDF) 49 Page - GigaDevice Semiconductor (Beijing) Inc.