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AFD4400 Datasheet(PDF) 49 Page - NXP Semiconductors |
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AFD4400 Datasheet(HTML) 49 Page - NXP Semiconductors |
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49 / 101 page ![]() Electrical characteristics AFD4400 Digital Front End Processor Data Sheet, Rev. 0 Freescale Semiconductor 49 This table provides the current consumption in various operating modes. JESD204 baud rate fjesd 9830.4 Mbps Ethernet (SGMII) baud rate fetsec 1250 Mbps DDR clock rate fddr 500 MHz Table 24. Power numbers Characteristic Condition Full run mode • All VSPA running FIR with 100% utilization • ARM running code with 100% utilization. • ARM Data accesses from DDR memory • 8 JESD TX and 8 JESD RX at 9.8G rate, 1 lane per interface • 2 JESD RX for SRx function at 9.8G rate • 4 CPRI running at 9.8G, 2 links in RE mode, 2 links in REC mode • 2 Ethernet ports running at 1.25G Maximum 105 VID 34.9 38.8 1,3,4 • All VSPA running FIR 70% with 10% control code • ARM running code with 75% utilization • 8 JESD TX and 8 JESD RX at 9.8G rate, 1 lane per interface • 2 JESD RX for SRx function at 9.8G rate • 4 CPRI running at 9.8G, 2 links in RE mode, 2 links in REC mode Thermal 105 VID 28.2 32.1 2,3,4 Typical 70 VID 22.6 26.5 2,3,4,5 Half run mode • Six VSPA running FIR with 100% utilization. Remaining five power gated. • ARM running code with 100% utilization. • ARM Data accesses from DDR memory • 4 JESD TX and 4 JESD RX at 9.8G rate, 1 lane per interface • 2 JESD RX for SRx function at 9.8G rate • 2 CPRI running at 9.8G, one link in RE mode, one link in REC mode • Single Ethernet lane running at 1.25G Maximum 105 VID 20.4 23.2 1,3,4 • Six VSPA running FIR 70% with 10% control code. Remaining five power gated. • ARM running code with 75% utilization • 4 JESD TX and 4 JESD RX at 9.8G rate, 1 lane per interface • 2 JESD RX for SRx function at 9.8G rate • 2 CPRI running at 9.8G, one link in RE mode, one link in REC mode Thermal 105 VID 16.7 19.5 2,3,4 Typical 70 VID 13.2 16.0 2,3,4,5 Table 23. Frequency definition for power consumption measurement (continued) Parameter Symbol Value Unit |
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