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Proprietary to OmniVision Technologies
Version 1.3, September 15, 2003
OV9625/OV9121
CMOS SXGA (1.3 MPixel) CAMERACHIP™
Omni
ision
09
COMC
0C
RW
Common Control C
Bit[7:5]:
Reserved
Bit[4]:
Sleep or power-down mode enable
0:
Normal
1:
Sleep mode
Bit[3:2]:
Crystal oscillator output current
00: Weakest
11: Strongest
Bit[1:0]:
Output Drive Select
00: Weakest
01: Double capability
10: Double capability
11: Triple drive current
0A
PIDH
96
R
Product ID Number MSB (Read only)
0B
PIDL
B1
R
Product ID Number LSB (Read only)
0C
COMD
28
RW
Common Control D
Bit[7]:
Reserved
Bit[6]:
Swap MSB and LSB at the output port
Bit[5:2]:
Reserved
Bit[1]:
Sensor precharge voltage selection
0:
Selects internal reference as precharge voltage
1:
Selects SVDD as precharge voltage
Bit[0]:
Snapshot option
0:
Enable live video output after snapshot sequence
1:
Output single frame only
0D
COME
00
RW
Common Control E
Bit[7]:
Reserved
Bit[6]:
Anti-blooming control
0:
Anti-blooming ON
1:
Anti-blooming OFF
Bit[5:3]:
Reserved
Bit[2]:
Clock output power-down pin status
0:
Maintain internal default states at power-down
1:
Tri-state the VSYNC and CHSYNC pins upon
power-down
Bit[1]:
Reserved
Bit[0]:
Digital port output
0:
Enable data port output
1:
Disable data port output
Table 11
Device Control Register List
Address
(Hex)
Register
Name
Default
(Hex)
R/W
Description
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