4
Proprietary to OmniVision Technologies
Version 1.3, September 15, 2003
OV9625/OV9121
CMOS SXGA (1.3 MPixel) CAMERACHIP™
Omni
ision
Sub-sampling Mode
Default resolution for the OV9625/OV9121 is 1280 x 1024
pixels, with all active pixels being output (see Figure 5).
The OV9625/OV9121 can be programmed to output in
640 x 480 (VGA) sized images for applications where
higher resolution image capture is not required.
Figure 5 Pixel Array
For VGA resolution, the following sub-sampling method is
available:
Progressive Sub-sampling
The entire array is sub-sampled for maximal image
quality.
Both
horizontal
and
vertical
pixels
are
sub-sampled to an aspect ration of 4:2 as illustrated in
Figure 6.
Figure 6 Sub-Sampling Mode
i
i+1
n
n+7
n+6
n+5
n+4
n+1
n+2
n+3
Row #
i+2 i+3 i+4 i+5 i+6 i+7 i+8 i+9
Column #
B
GR
G
B
GR
G
B
GR
G
B
GR
G
B
GR
G
B
GR
G
B
GR
G
B
GR
G
B
GR
G
B
GR
G
B
GR
G
B
GR
G
B
GR
G
B
GR
G
B
GR
G
B
GR
G
B
GR
G
B
GR
G
B
GR
G
B
GR
G
n
n+1
n+2
n+3
n+4
n+5
n+6
n+7
Column
Row
Skipped Pixels
BB
B
BB
B
GG
G
GG
G
RR
R
RR
R
GG
G
GG
G
Slave Operation Mode
The OV9625/OV9121 can be programmed to operate in
slave mode (default is master mode).
When used as a slave device, the OV9625/OV9121
changes the HSYNC and VSYNC outputs to input pins for
use as horizontal and vertical synchronization input
triggers supplied by the master device. The master device
must provide the following signals:
1.
System clock MCLK to XCLK1 pin
2.
Horizontal sync MHSYNC to CHSYNC pin
3.
Vertical frame sync MVSYNC to VSYNC pin
See Figure 7 for slave mode connections and Figure 8 for
detailed timing considerations. In this mode, the clock for
all devices should be the same. Otherwise, the devices
will suffer from flickering at line frequency.
Figure 7 Slave Mode Connection
Figure 8 Slave Mode Timing
Channel Average Calculator
OV9625/OV9121 provides average output level data for
the R/G/B channels along with frame-averaged luminance
level. Access to the data is via the serial control port.
Average values are calculated from 128 pixels per line (64
in VGA).
D[9:0]
CHSYNC
VSYNC
XCLK1
MHSYNC
MVSYNC
MCLK
Master
Device
OV9625
(OV9121)
NOTE:
1) THS > 6 Tclk, Tvs > Tline
2) Tline = 1520 x Tclk (SXGA); Tline = 800 x Tclk (VGA)
3) Tframe = 1050 x Tline (SXGA); Tframe = 500 x Tline (VGA)
T
frame
T
VS
T
line
T
clk
T
HS
VSYNC
HSYNC
MCLK
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