Register Set
Version 1.3, September 15, 2003
Proprietary to OmniVision Technologies
23
Omni
ision
19
VSTRT
01
(02 in
VGA)
RW
Vertical Window line start most significant 8 bits, LSB in register
COMM[4] (see “COMM” on page 26).
Bit[8:0]:
Selects the start of the vertical window, each LSB
represents four scan lines in SXGA or two scan lines in
VGA.
Note:
1. VSTRT[8:0] should be less than VEND[8:0].
2. For maximum output window size of 1292x1024, minimum value of
this register is 0x01.
1A
VEND
81
(7A in
VGA)
RW
Vertical Window line end most significant 8 bits, LSB in register
COMM[5] (see “COMM” on page 26).
Bit[8:0]:
Selects the end of the vertical window, each LSB
represents four scan lines in SXGA and two scan lines in
VGA.
Note:
1. VEND[8:0] should be larger than VSTRT[8:0].
2. For maximum output window size of 1292x1024, maximum value of
this register is 0x81.
1B
PSHFT
00
RW
Pixel Shift
Bit[7:0]:
Pixel delay count. Provides a method to fine tune the
output timing of the pixel data relative to the HREF pulse.
It physically shifts the video data output time in units of
pixel clock counts. The largest delay count is [FF] and is
equal to 255 x PCLK.
1C
MIDH
7F
R
Manufacturer ID Byte – High
(Read only = 0x7F)
1D
MIDL
A2
R
Manufacturer ID Byte – Low
(Read only = 0xA2)
1E-1F
RSVD
XX
–
Reserved
20
BOFF
10
RW
B Channel Offset Adjustment - auto controlled by internal circuit if
COMG[0] = 1 (see “COMG” on page 19)
Bit[7]:
Offset direction
0:
Add BOFF[6:0]
1:
Subtract BOFF[6:0]
Bit[6:0]:
B channel offset adjustment value
21
GbOFF
0F
RW
Gb Channel Offset Adjustment - auto controlled by internal circuit if
COMG[0] = 1 (see “COMG” on page 19)
Bit[7]:
Offset direction
0:
Add GbOFF[6:0]
1:
Subtract GbOFF[6:0]
Bit[6:0]:
Gb channel offset adjustment value
22
GrOFF
EF
RW
Gr Channel Offset Adjustment - auto controlled by internal circuit if
COMG[0] = 1 (see “COMG” on page 19)
Bit[7]:
Offset direction
0:
Add GrOFF[6:0]
1:
Subtract GrOFF[6:0]
Bit[6:0]:
Gr channel offset adjustment value
Table 11
Device Control Register List
Address
(Hex)
Register
Name
Default
(Hex)
R/W
Description
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