PFS123 datasheet(77/104 Pages) PADAUK

77 / 104 page

PFS123

8bit MTP MCU with 12-bit R-Type ADC

Page 77 of 104

PDK-DS-PFS123-EN_V000-Aug. 26, 2020

6.33. Timer2 Scalar Register (tm2s), IO address = 0x32

Bit

Reset

R/W

Description

PWM resolution selection.

0 : 8-bit

1 : 6-bit or 7-bit (by code option TMx_bit)

6 - 5

Timer2 clock pre-scalar.

00 : ÷ 1

01 : ÷ 4

10 : ÷ 16

11 : ÷ 64

4 - 0

00000

Timer2 clock scalar.

6.34. Timer2 Bound Register (tm2b), IO address = 0x33

Bit

Reset

R/W

Description

7 - 0

0x00

Timer2 bound register.

6.35. Timer3 Control Register (tm3c), IO address = 0x34

Bit

Reset

R/W

Description

7 - 4

0000

R/W

Timer3 clock selection.

0000 : disable

0001 : CLK

0010 : IHRC or IHRC *2 (by code option TMx_source)

0011 : EOSC

0100 : ILRC

0101 : comparator output

1000 : PA0 (rising edge)

1001 : ~PA0 (falling edge)

1010 : PB0 (rising edge)

1011 : ~PB0 (falling edge)

1100 : PA4 (rising edge)

1101 : ~PA4 (falling edge)

Others: reserved

Notice: In ICE mode and IHRC is selected for Timer3 clock, the clock sent to Timer3 does

NOT be stopped, Timer3 will keep counting when ICE is in halt state.

3 - 2

R/W

Timer3 output selection.

00 : disable

01 : PB5

10 : PB6

11 : PB7

R/W

Timer3 mode selection.

0 / 1 : period mode / PWM mode

R/W

Enable to inverse the polarity of Timer3 output.

0 / 1: disable / enable

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