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PFS123 Datasheet(PDF) 19 Page - PADAUK Technology.

Part # PFS123
Description  8bit MTP Type MCU with 12-bit R-Type ADC
PDF  104 Pages
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Manufacturer  PADAUK [PADAUK Technology.]
Direct Link  http://www.padauk.com.tw/
Logo PADAUK - PADAUK Technology.

PFS123 Datasheet(HTML) 19 Page - PADAUK Technology.

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PFS123
8bit MTP MCU with 12-bit R-Type ADC
©Copyright 2020, PADAUK Technology Co. Ltd
Page 19 of 104
PDK-DS-PFS123-EN_V000-Aug. 26, 2020
Symbol
Description
Min
Typ
Max
Unit
Conditions (Ta=25
oC)
VBG
Band-gap Reference Voltage
1.145*
1.20*
1.255*
V
VDD =2.2V ~ 5.5V
-20
oC <Ta<70oC*
fIHRC
Frequency of IHRC after
calibration *
15.76*
16*
16.24*
MHz
25
oC, V
DD =2.2V~5.5V
15.20*
16*
16.80*
VDD =2.2V~5.5V,
0
oC <Ta<70oC*
tINT
Interrupt pulse width
30
ns
VDD = 5.0V
VADC
ADC working voltage
2.2
VDD
V
VAD
AD Input Voltage
0
VDD
V
ADrs
ADC resolution
12
10
bit
0
oC <Ta<50oC*
-20
oC <Ta<70oC*
ADcs
ADC current consumption
0.9
0.8
mA
@5V
@3V
ADclk
ADC clock period
2
us
2.2V ~ 5.5V
tADCONV
ADC conversion time
(tADCLK is the period of the
selected AD conversion clock)
16
tADCLK
12-bit resolution
AD DNL
ADC Differential Non-Linearity
±4*
LSB
12-bit resolution LSB
AD INL
ADC Integral Non-Linearity
±8*
LSB
12-bit resolution LSB
ADos
ADC offset
5*
mV
@ VDD =3V
VDR
RAM data retention voltage*
1.5
V
in stop mode
tWDT
Watchdog timeout period
8k
TILRC
misc[1:0]=00 (default)
16k
misc[1:0]=01
64k
misc[1:0]=10
256k
misc[1:0]=11
tWUP
Wake-up time period (fast)
45
TILRC
Where TILRC is the time
period of ILRC
Wake-up time period (slow)
3000
tSBP
System boot-up period from
power-on for slow boot-up
50
ms
VDD =5V
System boot-up period from
power-on for Fast boot-up
750
us
VDD =5V
tRST
External reset pulse width
120
us
@ VDD =5V
CPos
Comparator offset*
-
±10
±20
mV
CPcm
Comparator input common
mode*
0
VDD -1.5
V
CPspt
Comparator response time*
100
500
ns
Both Rising and Falling
CPmc
Stable time to change
comparator mode
2.5
7.5
us
CPcs
Comparator current
consumption
20
uA
VDD = 3.3V



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