PFS172 datasheet(54/92 Pages) PADAUK

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PFS172

8bit MTP MCU with 8-bit ADC

Page 54 of 92

PDK-DS-PFS172-EN_V000-May 8, 2020

5.10.2 Power-Down mode (“stopsys”)

Power-Down mode is the state of deeply power-saving with turning off all the oscillator modules. By

using the “stopsys” instruction, this chip will be put on Power-Down mode directly. It is recommend to set

GPCC.7=0 to disable the comparator before the command “stopsys”.The following shows the internal

status of PFS172 detail when “stopsys” command is issued:

 All the oscillator modules are turned off.

 MTP memory is turned off.

 The contents of SRAM and registers remain unchanged.

 Wake-up sources: IO toggle in digital mode. (PxDIER bit is 1)

Wake-up from input pins can be considered as a continuation of normal execution. To minimize power

consumption, all the I/O pins should be carefully manipulated before entering power-down mode. The

reference sample program for power down is shown as below:

CLKMD

0xF4;

Change clock from IHRC to ILRC

CLKMD.4

disable IHRC

…

while (1)

{

STOPSYS;

enter power-down

(…)

break;

if wakeup happen and check OK, then return to high speed,

else stay in power-down mode again.

}

CLKMD

0x34;

Change clock from ILRC to IHRC/2

PFS172 Datasheet(PDF) 54 Page - PADAUK Technology.