PFS172 datasheet(16/92 Pages) PADAUK

16 / 92 page

PFS172

8bit MTP MCU with 8-bit ADC

Page 16 of 92

PDK-DS-PFS172-EN_V000-May 8, 2020

4. Device Characteristics

4.1. AC/DC Device Characteristics

All data are acquired under the conditions of VDD=5.0V, fSYS =2MHz unless noted.

Symbol

Description

Min

Typ

Max

Unit

Conditions (Ta=25

oC)

VDD

Operating Voltage

1.8*

5.0

5.5

* Subject to LVR tolerance

LVR%

Low Voltage Reset Tolerance

-5

fSYS

System clock (CLK)* =

IHRC/2

IHRC/4

IHRC/8

ILRC

56K

VDD ≧ 3.0V

VDD ≧ 2.2V

VDD ≧ 1.8V

VDD = 5.0V

Pcycle

Program cycle

1000

cycles

IOP

Operating Current

0.6

fSYS=IHRC/16=1MIPS@5.0V

fSYS=ILRC

IPD

Power Down Current

(by stopsys command)

0.9

0.6

fSYS= 0Hz,VDD=5.0V

fSYS= 0Hz,VDD=3.3V

IPS

Power Save Current

(by stopexe command)

3.1

VDD =5.0V; fSYS= ILRC

Only ILRC module is enabled.

VIL

Input low voltage for IO lines

0.2 VDD

VIH

Input high voltage for IO lines

0.7 VDD

VDD

IOL

IO lines Sink current

PB4, PB7 (Strong)

PB4, PB7 (Normal)

Other IOs

VDD=5.0V, VOL=0.5V

IOH

IO lines Drive current

PB4, PB7 (Strong)

PB4, PB7 (Normal)

PA5

Other IOs

VDD=5.0V, VOH=4.5V

VIN

Input voltage

-0.3

VDD+0.3

IINJ (PIN)

Injected current on pin

VDD +0.3≧VIN≧ -0.3

RPH

Pull-high Resistance

KΩ

PB1/PB4 @VDD =5.0V

PB7@VDD =5.0V

Other IO

RPL

Pull-low Resistance

KΩ

PB1/PB4 @VDD =5.0V

PB7 @VDD =5.0V

Other IO

VBG

Bandgap Reference Voltage

1.145*

1.20*

1.255*

VDD =1.8V ~ 5.5V

-20

oC <Ta<70oC*

PFS172 Datasheet(PDF) 16 Page - PADAUK Technology.

PFS172 Datasheet(HTML) 16 Page - PADAUK Technology.

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92

Datasheet Download

Link URL