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PFS172 Datasheet(PDF) 15 Page - PADAUK Technology. |
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PFS172 Datasheet(HTML) 15 Page - PADAUK Technology. |
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15 / 92 page ![]() PFS172 8bit MTP MCU with 8-bit ADC ©Copyright 2020, PADAUK Technology Co. Ltd Page 15 of 92 PDK-DS-PFS172-EN_V000-May 8, 2020 Pin Name Pin Type & Buffer Type Description PB3 / AD3 IO ST / CMOS / Analog The functions of this pin can be: (1) Bit 3 of port B. It can be configured as digital input, two-state output with pull-high / pull-low resistor by software independently. (2) Channel 3 of ADC analog input When this pin is configured as analog input, please use bit 3 of register pbdier to disable the digital input to prevent current leakage. The bit 3 of pbdier register can be set to “0” to disable digital input; wake-up from power-down by toggling this pin is also disabled. PB2 / AD2 / TM2PWM IO ST / CMOS / Analog The functions of this pin can be: (1) Bit 2 of port B. It can be configured as digital input, two-state output with pull-high / pull-low resistor by software independently. (2) Channel 2 of ADC analog input (3) PWM output from Timer2 When this pin is configured as analog input, please use bit 2 of register pbdier to disable the digital input to prevent current leakage. The bit 2 of pbdier register can be set to “0” to disable digital input; wake-up from power-down by toggling this pin is also disabled. PB1 / AD1 IO ST / CMOS / Analog The functions of this pin can be: (1) Bit 1 of port B. It can be configured as digital input, two-state output with pull-high / pull-low resistor by software independently. (2) Channel 1 of ADC analog input When this pin is configured as analog input, please use bit 1 of register pbdier to disable the digital input to prevent current leakage. The bit 1 of pbdier register can be set to “0” to disable digital input; wake-up from power-down by toggling this pin is also disabled. PB0 / AD0 / INT1 IO ST / CMOS / Analog The functions of this pin can be: (1) Bit 0 of port B. It can be configured as digital input, two-state output with pull-high / pull-low resistor by software independently. (2) Channel 0 of ADC analog input (3) External interrupt line 1. It can be used as an external interrupt line 1. Both rising edge and falling edge are accepted to request interrupt service and configurable by register setting. When this pin is configured as analog input, please use bit 0 of register pbdier to disable the digital input to prevent current leakage. The bit 0 of pbdier register can be set to “0” to disable digital input; wake-up from power-down by toggling this pin is also disabled. VDD / AVDD VDD / AVDD VDD: Digital positive power AVDD: Analog positive power VDD is the IC power supply while AVDD is the ADC power supply. AVDD and VDD are double bonding internally and they have the same external pin. GND / AGND GND / AGND GND: Digital negative power AGND: Analog negative power GND is the IC ground pin while AGND is the ADC ground pin. AGND and GND are double bonding internally and they have the same external pin. Notes: IO: Input/Output; ST: Schmitt Trigger input; Analog: Analog input pin; CMOS: CMOS voltage level |
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