AD4115 datasheet(4/51 Pages) AD

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AD4115

Data Sheet

Rev. 0 | Page 4 of 51

SPECIFICATIONS

AVDD = 4.5 V to 5.5 V, IOVDD = 2 V to 5.5 V, AVSS = 0 V, DGND = 0 V, VBIAS− = 0 V, REF+ = 2.5 V, REF− = AVSS, internal master

clock (MCLK) = 8 MHz, TA = TMIN to TMAX (−40°C to +105°C), unless otherwise noted. VREF is the reference voltage, FS is full scale, and

FSR is full-scale range.

Table 1.

Parameter

Test Conditions/Comments

Min

Typ

Max

Unit

VOLTAGE INPUTS

Differential Input Voltage Range1

Specified performance

−10

+10

Functional

−VREF × 10

+VREF × 10

Absolute Input Pin Voltage

−20

+20

Input Impedance

MΩ

Offset Error2

TA = 25°C

±1.5

Offset Drift

±8

µV/°C

Gain Error

TA = 25°C

±0.05

% FS

Gain Drift

±1

ppm/°C

Integral Nonlinearity (INL)

±0.01

% FSR

Total Unadjusted Error (TUE)3

TA = 25°C, internal VREF

0.07

% FSR

0°C to 105°C, internal VREF

0.1

% FSR

−40°C to +105°C, internal VREF

0.12

% FSR

25°C, external VREF

0.07

% FSR

−40°C to +105°C, external VREF

0.08

% FSR

Power Supply Rejection Ratio (PSRR)

AVDD for input voltage (VIN) = 1 V

Common-Mode Rejection Ratio

(CMRR)

VIN = 1 V

At DC

At 50 Hz and 60 Hz

20 Hz output data rate (postfilter), 50 Hz ±

1 Hz and 60 Hz ± 1 Hz

120

Normal Mode Rejection3

50 Hz ± 1 Hz and 60 Hz ± 1 Hz

Internal clock, 20 SPS ODR (postfilter)

External clock, 20 SPS ODR (postfilter)

Resolution

See Table 16 and Table 17

Noise

See Table 16 and Table 17

ADC SPEED AND PERFORMANCE

ADC Output Data Rate (ODR)

One channel, see Table 16

2.5

125,000

SPS

No Missing Codes3

Excluding sinc3 filter ≥ 62.5 kHz notch

Bits

INTERNAL REFERENCE

100 nF external capacitor to AVSS

Output Voltage

REFOUT with respect to AVSS

2.5

Initial Accuracy3, 4

REFOUT, TA = 25°C

−0.12

+0.12

Temperature Coefficient

±5

+12

ppm/°C

Reference Load Current (ILOAD)

−10

+10

PSRR

AVDD (line regulation)

Load Regulation (∆VOUT/∆ILOAD5)

ppm/mA

Voltage Noise (eN)

0.1 Hz to 10 Hz, 2.5 V reference

4.5

µV rms

Voltage Noise Density

1 kHz, 2.5 V reference

215

nV/√Hz

Turn On Settling Time

100 nF REFOUT capacitor

200

µs

Short-Circuit Current (ISC)

EXTERNAL REFERENCE INPUTS

Differential Input Range

VREF = (REF+) − (REF−)

2.5

AVDD

Absolute Voltage Limits

Buffers Disabled

AVSS − 0.05

AVDD + 0.05

Buffers Enabled

AVSS

AVDD

External Reference Input Current

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