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AD4115 Datasheet(PDF) 19 Page - Analog Devices |
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AD4115 Datasheet(HTML) 19 Page - Analog Devices |
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19 / 51 page  Data Sheet AD4115 Rev. 0 | Page 19 of 51 Gain Registers The gain registers are 24-bit, read and write registers that hold the gain calibration coefficient for the ADC. The power-on reset value of the gain registers is 0x5XXXX0. Offset Registers The offset registers are 24-bit, read and write registers that hold the offset calibration coefficient for the ADC. The power-on reset value of the offset registers is 0x800000. ADC Mode and Interface Mode Configuration The ADC mode register and the interface mode register configure the core peripherals for the AD4115 to use, as well as the mode for the digital interface. ADC Mode Register The ADC mode register primarily sets the ADC conversion mode to either continuous or single conversion. The user can also select the standby and power-down modes, as well as any of the calibration modes. The ADC mode register also contains the clock source select bits and internal reference enable bit. The reference select bits are contained in the setup configuration registers (see the Setup Configuration section for more information). The details of the ADC mode register are shown in Table 14. Interface Mode Register The interface mode register configures the digital interface operation. This register allows the user to control data-word length, CRC enable, data plus status read, and continuous read mode. The details of this register are shown in Table 15. For more information, see the Digital Interface section. Table 14. ADC Mode Register Register Name Bits Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 Reset R/W 0x01 ADCMODE [15:8] REF_EN Reserved SING_CYC Reserved Delay 0x2000 R/W [7:0] Reserved Mode CLOCKSEL Reserved Table 15. Interface Mode Register Register Name Bits Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 Reset R/W 0x02 IFMODE [15:8] Reserved ALT_ SYNC IOSTRENGTH Reserved DOUT_RESET 0x0000 R/W [7:0] CONTREAD DATA_ STAT REG_ CHECK Reserved CRC_EN Reserved WL16 |
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