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AD4115 Datasheet(PDF) 14 Page - Analog Devices |
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AD4115 Datasheet(HTML) 14 Page - Analog Devices |
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14 / 51 page ![]() AD4115 Data Sheet Rev. 0 | Page 14 of 51 THEORY OF OPERATION The AD4115 offers a fast settling, high resolution, multiplexed ADC with high levels of configurability, including the following features: • Eight fully differential voltage inputs or 16 single-ended voltage inputs. • High impedance voltage divider with integrated precision matched resistors • Embedded proprietary iPassives® technology within a small device footprint. • Per channel configurability where up to eight different setups can be defined. A separate setup can be mapped to each channel. Each setup allows the user to configure whether the buffers are enabled or disabled, gain and offset correction, filter type, ODR, and reference source selection. • Highly configurable digital filter enabling conversion rates up to 125 kSPS on a single channel and 24.845 kSPS switching. The AD4115 includes a precision, 2.5 V, low drift (±5 ppm/°C), band gap internal reference. Use this reference in ADC conversions to reduce the external component count. When enabled, the internal reference is output to the REFOUT pin. The internal reference can be used as a low noise biasing voltage for the external circuitry and must be connected to a 0.1 μF decoupling capacitor. The AD4115 includes two separate linear regulator blocks for the analog and digital circuitry. The analog LDO regulator regulates the AVDD supply to 1.8 V. The linear regulator for the digital IOVDD supply performs a function similar to the LDO regulator and regulates the input voltage applied at the IOVDD pin to 1.8 V. The serial interface signals always operate from the IOVDD supply seen at the pin. For example, if 3.3 V is applied to the IOVDD pin, the interface logic inputs and outputs operate at this level. The AD4115 is designed for a multitude of factory automation and process control applications, including PLC and DCS modules. The AD4115 reduces overall system cost and design burden and maintains a high level of accuracy. The AD4115 offers the following system benefits: • A single 5 V power supply. • Guaranteed minimum 1 MΩ input impedance. • Overrange voltage greater than ±10 V. • Reduced calibration costs. • High channel count. DGND AD4115 IOVDD CS REGCAPD AVSS REGCAPA AVDD XTAL1 1 3 2 12 13 14 15 16 17 20 21 22 9 7 8 IOVDD 0.1µF AVDD 0.1µF CX1 16MHz CX2 0.1µF 1µF 0.1µF 1µF OPTIONAL EXTERNAL CRYSTAL CIRCUITRY CAPACITORS CLKIN OPTIONAL EXTERNAL CLOCK INPUT VIN0 VIN1 VINCOM XTAL2/CLKIO DOUT/RDY DIN SCLK CS DOUT/RDY DIN SCLK 11 VBIAS– REFOUT 6 0.1µF 37 VIN15 Figure 19. Typical Connection Diagram |
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