AD4682 datasheet(20/30 Pages) AD

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AD4682/AD4683

Data Sheet

Rev. 0 | Page 20 of 30

Shutdown Mode

When slower throughput rates and lower power consumption

are required, use shutdown mode by either powering down the

ADC between each conversion, or by performing a series of

conversions at a high throughput rate and then powering down

the ADC for a relatively long duration between these burst

conversions. When the AD4682 and the AD4683 are in shutdown

mode, all analog circuitry powers down, including the internal

reference, if enabled. The SPI remains active during shutdown

mode to allow the AD4682 and the AD4683 to exit shutdown

mode.

To enter shutdown mode, write to the PMODE bit in the

CONFIGURATION1 register. The AD4682 and the AD4683

shut down, and current consumption reduces.

To exit shutdown mode and return to normal mode, set the

PMODE bit in the CONFIGURATION1 register to Logic 0. All

exiting shutdown mode. After exiting shutdown mode, allow

sufficient time for the circuitry to turn on before starting a

conversion. If the internal reference is enabled, allow the

reference to settle for accurate conversions to happen.

INTERNAL AND EXTERNAL REFERENCE

The AD4682 and the AD4683 have a buffered 2.5 V internal

reference primarily used as a reference voltage for device operation.

When using the buffered internal 2.5 V reference externally via

the REFIO pin, the reference must use an external buffer before

connecting to the external circuitry. Alternatively, if a more

accurate reference or higher dynamic range is required, an

external reference can be supplied. An externally supplied

reference voltage can range from 2.5 V to 3.3 V.

Reference selection, internal or external, is configured by the

REFSEL bit in the CONFIGURATION1 register. If the REFSEL

bit is set to 0, the internal reference buffer is enabled. If the

REFSEL bit is set to 1, the internal reference buffer is disabled. If

an external reference is preferred, set the REFSEL bit to 1 and

supply an external reference to the REFIO pin.

SOFTWARE RESET

The AD4682 and the AD4683 have two reset modes, a soft reset

and a hard reset. To initiate a reset, write to the reset bits,

Bits[7:0], in the CONFIGURATION2 register.

A soft reset maintains the contents of the configurable registers

but refreshes the interface and the ADC blocks. Any internal

state machines are reinitialized, and the oversampling block

and FIFO are flushed. The ALERT register is then cleared. The

reference and LDO regulator remain powered.

A hard reset, in addition to the blocks reset by a soft reset, resets all

user registers to default status, resets the reference buffer, and

resets the internal oscillator block.

SOFTWARE RESET

tRESET

SDI

Figure 38. Software Reset Operation

DIAGNOSTIC SELF TEST

The AD4682 and the AD4683 run a diagnostic self test after a

power-on reset (POR) or after a software hard reset to ensure

the proper configuration is loaded into the device.

The result of the self test is displayed in the SETUP_F bit in the

ALERT register. If the SETUP_F bit is set to Logic 1, the diagnostic

self test fails. If the self test fails, perform a software hard reset

to reset the AD4682 and the AD4683 registers to the default status.

SHUTDOWN

NORMAL

SDI

tSTARTUP

SHUTDOWN MODE

NORMAL MODE

ACCURATE CONVERSION

Figure 39. Shutdown Mode Operation

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