AD4682 datasheet(24/30 Pages) AD

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AD4682/AD4683

Data Sheet

Rev. 0 | Page 24 of 30

CRC

The AD4682 and the AD4683 have CRC checksum modes that

can improve interface robustness by detecting errors in data

transmissions. The CRC feature is independently selectable for

SPI reads and SPI writes. For example, the CRC function for

SPI writes can be enabled to prevent unexpected changes to the

device configuration but disabled on SPI reads, therefore

maintaining a higher throughput rate. The CRC feature is

controlled by the programming of the CRC_W bit and CRC_R

bits in the CONFIGURATION1 register.

CRC Read

If enabled, a CRC is appended to the conversion result or register

reads and consists of an 8-bit word. The CRC is calculated in

the conversion result for ADC A and ADC B and is output on

SDOA. A CRC is also calculated and appended to register read

outputs.

The CRC read function can be used in 2-wire SPI mode, 1-wire

SPI mode, and resolution boost mode.

CRC Write

To enable the CRC write function, set the CRC_W bit in the

CONFIGURATION1 register to 1. To set the CRC_W bit to 1

to enable the CRC feature, ensure the request frame has a valid

CRC appended to the frame.

After the CRC feature is enabled, all register write requests are

ignored unless the requests are accompanied by a valid CRC

command, requiring a valid CRC to both enable and disable the

CRC write feature.

CRC Polynomial

For CRC checksum calculations, the following polynomial is

always used: x8+ x2 + x + 1.

The following is an example of how to generate the checksum

on a conversion read. The 16-bit data conversion result of the

two channels is combined to produce 32-bit data. The 8 MSBs

of the 32-bit data are inverted and then left shifted by eight bits

to create a number ending in eight logic zeros. The polynomial

is aligned such that its MSB is adjacent to the leftmost Logic 1

of the data. An exclusive OR (XOR) function is applied to the

data to produce a new, shorter number. The polynomial is again

aligned such that its MSB is adjacent to the leftmost Logic 1 of

the new result, and the procedure is repeated. This process repeats

until the original data is reduced to a value less than the

polynomial, which is the 8-bit checksum. For example, this

polynomial is 100000111.

Let the original data of two channels be 0xAAAA and 0x5555,

that is, 1010 1010 1010 1010 and 0101 0101 0101 0101. The data

of the two channels is then appended, including eight zeros on

the right. The data then becomes 1010 1010 1010 1010 0101

0101 0101 0101 0000 0000.

Table 12 shows the CRC calculation of 16-bit two-channel data.

In the final XOR operation, the reduced data is less than the

polynomial. Therefore, the remainder is the CRC for the

assumed data.

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