AD4682/AD4683

Data Sheet

Rev. 0 | Page 28 of 30

CONFIGURATION2 REGISTER

Address: 0x2, Reset: 0x0000, Name: CONFIGURATION2

Addres s ing

Res et

SDO

0

0

1

0

2

0

3

0

4

0

5

0

6

0

7

0

8

0

9

0

10

0

11

0

12

0

13

0

14

0

15

0

[15:12] ADDRESSING (R/W)

[7:0] RESET (R/W)

[11:9] RESERVED

[8] SDO (R/W)

Table 17. Bit Descriptions for CONFIGURATION2

Bits

Bit Name

Description

Reset

Access

[15:12]

ADDRESSING

Addressing. Bits[15:12] define the address of the relevant register. See the Addressing Registers

section for further details.

0x0

R/W

[11:9]

RESERVED

Reserved.

0x0

R

8

SDO

SDO. Conversion results in the serial data output.

0x0

R/W

0: 2-wire. Conversion data are output on both the SDOA and SDOB/ALERT pins.

1: 1-wire. Conversion data are output on the SDOA pin only.

[7:0]

RESET

Reset.

0x0

R/W

0x3C performs a soft reset that resets some blocks. Register contents remain unchanged.

Clears the ALERT register and flushes any oversampling stored variables or any active state

machines.

0xFF performs a hard reset that resets all possible blocks in the AD4682 or the AD4683.

Register contents are set to defaults. All other values are ignored.

ALERT REGISTER

Address: 0x3, Reset: 0x0000, Name: ALERT

Addres s ing

Alert A Low

Alert A High

CRC Error

Load Error

Alert B Low

Alert B High

0

0

1

0

2

0

3

0

4

0

5

0

6

0

7

0

8

0

9

0

10

0

11

0

12

0

13

0

14

0

15

0

[15:12] ADDRESSING (R)

[0] AL_A_LOW (R)

[11:10] RESERVED

[1] AL_A_HIGH (R)

[9] CRCW_F (R)

[3:2] RESERVED

[8] SETUP_F (R)

[4] AL_B_LOW (R)

[7:6] RESERVED

[5] AL_B_HIGH (R)

Table 18. Bit Descriptions for ALERT

Bits

Bit Name

Description

Reset

Access

[15:12]

ADDRESSING

Addressing. Bits[15:12] define the address of the relevant register. See the Addressing Registers

section for further details.

0x0

R

[11:10]

RESERVED

Reserved.

0x0

R

9

CRCW_F

CRC Error. Indicates that a register write command failed due to a CRC error. This fault bit is

sticky and remains set until the register is read.

0x0

R

0: no CRC error.

1: CRC error.

8

SETUP_F

Load Error. The SETUP_F bit indicates that the device configuration data did not load

properly on startup. The SETUP_F bit does not clear on an ALERT register read. A hard reset

via the CONFIGURATION2 register is required to clear the SETUP_F bit and restart the device

setup again.

0x0

R

0: no setup error.

1: setup error.

[7:6]

RESERVED

Reserved.

0x0

R