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AD9083BBCZ Datasheet(PDF) 1 Page - Analog Devices |
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AD9083BBCZ Datasheet(HTML) 1 Page - Analog Devices |
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1 / 93 page  16-Channel, 125 MHz Bandwidth, JESD204B Analog-to-Digital Converter Data Sheet AD9083 Rev. 0 Document Feedback Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibilityisassumedbyAnalogDevicesforitsuse,norforanyinfringementsofpatentsorother rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices.Trademarksandregisteredtrademarksarethepropertyoftheirrespectiveowners. One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 781.329.4700 ©2021 Analog Devices, Inc. All rights reserved. Technical Support www.analog.com FEATURES 1.0 V and 1.8 V supply operation 125 MHz usable analog input bandwidth Sample rate up to 2 GSPS Noise spectral density in 100 MHz bandwidth = −145 dBFS/Hz, 2.0 GSPS encode SNR = 66 dBFS in 100 MHz bandwidth, 2.0 GSPS encode SNR = 82 dBFS in 15.625 MHz bandwidth, 2.0 GSPS encode SFDR = 60 dBc in 100 MHz bandwidth, 2.0 GSPS encode SFDR = 80 dBc in 15.625 MHz bandwidth, 2.0 GSPS encode 90 mW total power per channel at 2.0 GSPS (default settings) Flexible input range: 0.5 V p-p to 2 V p-p differential 90 dB channel crosstalk, 2.0 GSPS encode Digital processor CIC decimation filter Programmable DDC Data gating JESD204B Subclass 1 encoded outputs Supports up to 16 Gbps/lane Flexible sample data processing Flexible JESD204B lane configurations Large signal dither Serial port control APPLICATIONS Millimeter wave imaging Electronic beam forming and phased arrays Multichannel wideband receivers Electronic support measures PRODUCT HIGHLIGHTS 1. Continuous time, Σ-Δ analog-to-digital converters (ADCs) support signal bandwidths of up to 125 MHz with low power and minimal filtering. 2. Integrated digital processing blocks reduce data payload and lower overall system cost. 3. Configurable JESD204B interface reduces printed circuit board (PCB) complexity. 4. Flexible power-down options. 5. SPI interface controls various product features and functions to meet specific system requirements. 6. Small, 9 mm × 9 mm, 100-ball CSP_BGA package, simple interface, and integrated digital processing save PCB space. FUNCTIONAL BLOCK DIAGRAM AVERAGING AND DECIMATION FILTER PLL, JESD204B SUBCLASS1 CONTROL, AND CLOCK DISTRIBUTION SPI AND CONTROL REGISTERS DECIMATE BY J JESD204B OUTPUTS SERDOUT0± SERDOUT1± SERDOUT2± SERDOUT3± SYNCINB± MIXER NCO2 NCO1 NCO0 CIC DECIMATOR MIXER MIXER AGND DGND PD/STBY AVERAGING AND DECIMATION FILTER AVERAGING AND DECIMATION FILTER 16 CHANNELS ADC VIN1+ TO VIN16+ AVDD (1V) AVDD1P8 (1.8V) DVDD1P8 (1.8V) DVDD (1V) VIN1– TO VIN16– CLK± SYSREF± TRIG± CSB SCLK SDIO GAIN GAIN GAIN AD9083 Figure 1. |
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