AT90PWM2 datasheet(176/365 Pages) ATMEL

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176

AT90PWM2/3

4317A-3–AVR–02/05

PSC n Input A Control

PSC n Input B Control

The Input Control Registers are used to configure the 2 PSC’s Retrigger/Fault block A &

B. The 2 blocks are identical, so they are configured on the same way.

• Bit 7 – PCAEnx : PSC n Capture Enable Input Part x

Writing this bit to one enables the capture function when external event occurs on input

selected as input for Part x (see PISELnx bit in the same register).

• Bit 6 – PISELnx : PSC n Input Select for Part x

Clear this bit to select PSCINn as input of Fault/Retrigger block x.

Set this bit to select Comparator n Output as input of Fault/Retrigger block x.

• Bit 5 –PELEVnx : PSC n Edge Level Selector of Input Part x

When this bit is clear, the falling edge or low level of selected input generates the signif-

icative event for retrigger or fault function .

When this bit is set, the rising edge or high level of selected input generates the signifi-

cative event for retrigger or fault function.

• Bit 4 – PFLTEnx : PSC n Filter Enable on Input Part x

Setting this bit (to one) activates the Input Capture Noise Canceler. When the noise can-

celer is activated, the input from the retrigger pin is filtered. The filter function requires

four successive equal valued samples of the retrigger pin for changing its output. The

Input Capture is therefore delayed by four oscillator cycles when the noise canceler is

enabled.

• Bit 3:0 – PRFMnx3:0: PSC n Fault Mode

These four bits define the mode of operation of the Fault or Retrigger functions.

(see PSC Functional Specification for more explanations)

Table 68. Level Sensitivity and Fault Mode Operation

Bit

PCAEnA

PISELnA PELEVnA PFLTEnA PRFMnA3 PRFMnA2 PRFMnA1 PRFMnA0

PFRCnA

Read/Write

R/W

Initial Value

Bit

PCAEnB

PISELnB PELEVnB PFLTEnB PRFMnB3 PRFMnB2 PRFMnB1 PRFMnB0

PFRCnB

Read/Write

R/W

Initial Value

PRFMnx3:0

Description

0000b

No action, PSC Input is ignored

0001b

PSC Input Mode 1: Stop signal, Jump to Opposite Dead-Time and

Wait

0010b

PSC Input Mode 2: Stop signal, Execute Opposite Dead-Time and

Wait

AT90PWM2 Datasheet(PDF) 176 Page - ATMEL Corporation

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