AXM0F243 datasheet(38/53 Pages) ONSEMI

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AXM0F243

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Table 52. PWRMODE REGISTER

AX5043_PWRMODE

Description

Name

1000

SYNTHRX

The synthesizer is running on the receive frequency. Transmitter and receiver are still off.

This mode is used to let the synthesizer settle on the correct frequency for receive.

1001

FULLRX

Synthesizer and receiver are running.

1011

WOR

Receiver wakeup−on−radio mode.

The mode the same as POWERDOWN, but the 640 Hz internal low power oscillator is

running.

1100

SYNTHTX

The synthesizer is running on the transmit frequency. Transmitter and receiver are still off.

This mode is used to let the synthesizer settle on the correct frequency for transmit.

1101

FULLTX

Synthesizer and transmitter are running. Do not switch into this mode before the synthesiz-

er has completely settled on the transmit frequency (in SYNTHTX mode), otherwise spuri-

ous spectral transmissions will occur.

Table 53. A TYPICAL AX5043_PWRMODE SEQUENCE FOR A TRANSMIT SESSION

Step

PWRMODE

Remarks

POWERDOWN

STANDBY

The settling time is dominated by the crystal used, typical value 3ms.

FULLTX

Data transmission

POWERDOWN

Table 54. A TYPICAL AX5043_PWRMODE SEQUENCE FOR A RECEIVE SESSION

Step

PWRMODE [3:0]

Remarks

POWERDOWN

STANDBY

The settling time is dominated by the crystal used, typical value 3ms.

FULLRX

Data reception

POWERDOWN

Voltage Regulator

The AXM0F243 transceiver uses its own dedicated

on−chip voltage regulator system to create stable supply

voltages for the internal circuitry from the primary supply

VDD_IO. The I/O level of the digital pins is VDD_IO.

Pins VDD_ANA are supplied for external decoupling of

the power supply used for the on−chip PA.

The voltage regulator system must be set into the

appropriate state before receive or transmit operations can

be initiated. This is handled automatically when

programming

the

device

modes

via

the

AX5043_PWRMODE register.

can be read to check if the regulated voltages are ready (bit

SVIO) or if VDD_IO has dropped below the brown−out

level of 1.3 V (bit SSUM).

In power−down mode the core supply voltages for digital

and analog functions are switched off to minimize leakage

power. Most register contents are preserved but access to the

FIFO is not possible and FIFO contents are lost.

In deep−sleep mode all supply voltages are switched off.

All digital and analog functions are disabled. All register

contents are lost.

AXM0F243 Datasheet(PDF) 38 Page - ON Semiconductor

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