GS12341 datasheet(38/109 Pages) SEMTECH

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GS12341

Final Data Sheet

Rev.1

PDS-061928

August 2019

38 of 109

Semtech

Proprietary & Confidential

www.semtech.com

4.7 Output Drivers

The GS12341 features two independently-configurable output drivers (see Figure 3-2),

with data (reclocked or bypassed) available on both outputs. The two drivers provide

highly-configurable amplitude and pre-emphasis control. The signal on the outputs can

be inverted to help with signal polarity when layout requires trace inversion. The PRBS

generator is available on both outputs. The LOS (Loss Of Signal) status from the

equalizer stage can be used to automatically mute or disable the outputs on their

assertion. The Loss of Lock status from the Reclocker block can be used to mute the

outputs. The trace drivers can be configured to mute or disable during sleep. The sleep

control modes takes precedence over the manual or automatic LOS and Loss of Lock

output control modes.

Note: The <n> in the control parameter names refers to the output number. Output 0 is

DDO0/DDO0 and output 1 is DDO1/DDO1.

4.7.1 Bypassed Reclocker Signal Output Control

With the default power-up settings, the GS12341 outputs will automatically switch to

the bypassed signal (non-reclocked) whenever the PLL is unlocked. Alternatively,

manual reclocker bypass may be configured by setting the

CTRL_OUTPUT<n>_RETIMER_ AUTO_BYPASS and

CTRL_OUTPUT<n>_RETIMER_MANUAL_BYPASS parameters in register 0x4C to 0b

and 1b respectively via the host interface, in which case the PLL will remain bypassed for

all rates.

The reclocker bypass function, manual or automatic, does not affect the input

equalization function of the device.

If both outputs are manually disabled, then the device will power down the Reclocker

block and features of the reclocker such as rate detect and lock detect will no longer be

accessible in this mode.

52, PRBS_GEN_ CTRL

CTRL_PRBS_GEN_SIGNAL_SELECT

Selects between setting the output of the PRBS

generator to being a clock or a PRBS test signal.

CTRL_PRBS_GEN_CLK_SRC

Selects the clock source used by the PRBS generator.

CTRL_PRBS_GEN_CLK_DIVIDER

If a clock is selected as the PRBS output signal, this

parameter sets the divide ratio of the clock.

CTRL_PRBS_GEN_INVERT

Allows the polarity of the PRBS signal to be inverted.

CTRL_PRBS_GEN_DATA_RATE

If a PRBS test signal is selected as the output signal, this

parameter sets the data rate of the PRBS7 signal.

CTRL_PRBS_GEN_ENABLE

Used to enable or disable the PRBS generator.

Table 4-7: PRBS Generator Parameter Descriptions (Continued)

and Name

Parameter Name

Description

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