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GS12341 Datasheet(PDF) 20 Page - Semtech Corporation |
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GS12341 Datasheet(HTML) 20 Page - Semtech Corporation |
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20 / 109 page ![]() GS12341 Final Data Sheet Rev.1 PDS-061928 August 2019 20 of 109 Semtech Proprietary & Confidential www.semtech.com Note: The parameters referred to within Section 4.3.1 to Section 4.3.2 are linked to their respective registers in Table 4-3. For a complete list of registers and functions, please see Section 5. 4.3.1 PLL Loop Bandwidth Control The ratio of output peak-to-peak jitter to input peak-to-peak jitter of the Reclocker can be represented by a low-pass jitter transfer function, with a bandwidth equal to the PLL loop bandwidth. Although the default loop bandwidth settings for the GS12341 Reclocker are ideal for most SDI signals, the GS12341 allows the user to adjust the loop bandwidth for each supported rate. Registers 0x0A through 0x0C contain the following parameters which allow the user to configure rate dependent loop bandwidth: CFG_PLL_LBW_12G, CFG_PLL_LBW_6G, CFG_PLL_LBW_3G, CFG_PLL_LBW_HD, CFG_PLL_LBW_SD, and CFG_PLL_LBW_MADI. The loop bandwidth settings are defined in terms of ratios of the nominal loop bandwidth. For each rate, where '1.0x' is the nominal loop bandwidth, the following ratios are available: 0.0625x, 0.125x, 0.25x, 0.5x, and 1.0x. Table 2-3 provides the specific loop bandwidths for each data rate and loop bandwidth setting. Lowering the loop bandwidth will lower the jitter amplitude above the loop bandwidth frequency. Although lower output jitter is desirable, the lower loop bandwidth may reduce the device’s IJT to very high jitter that may be present outside the loop bandwidth. 4.3.2 Automatic and Manual Rate Detection With the default rate detect setting, the Reclocker will automatically attempt to lock to any of following data rates: MADI (125Mb/s), SD-SDI (270Mb/s), HD-SDI (1.485Gb/s), 3G-SDI (2.97Gb/s), 6G-SDI (5.94Gb/s) and 12G-SDI (11.88Gb/s). This includes the f/1.001 rates. However, the Reclocker can be configured to only lock to a single rate, by setting the CFG_AUTO_RATE_DETECT_ENA and CFG_MANUAL_RATE parameters in register 0x06. The STAT_LOCK parameter in register 0x86 will indicate that the Reclocker is locked when its value is 1b and unlocked when its value is 0b. The lock status can also be monitored externally on any GPIO pin, however it is the default mode for GPIO1, pin 18. The STAT_DETECTED_RATE parameter in register 0x87 will indicate the data rate at which the Reclocker is locked to. A value of 0d in the STAT_DETECTED_RATE parameter indicates that the device is not locked, while values between 1d and 6d will indicate that the device is locked to one of the six available rates between MADI at 125Mb/s and UHD-SDI at 11.88Gb/s. |
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