Electronic Components Datasheet Search
  English  ▼

X  

Preview PDF HTML

GS12341 Datasheet(PDF) 64 Page - Semtech Corporation

Part # GS12341
Description  12G UHD-SDI Reclocking Adaptive Cable Equalizer
PDF  109 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
Manufacturer  SEMTECH [Semtech Corporation]
Direct Link  http://www.semtech.com
Logo SEMTECH - Semtech Corporation

GS12341 Datasheet(HTML) 64 Page - Semtech Corporation

Back Button GS12341 Datasheet HTML 60Page - Semtech Corporation GS12341 Datasheet HTML 61Page - Semtech Corporation GS12341 Datasheet HTML 62Page - Semtech Corporation GS12341 Datasheet HTML 63Page - Semtech Corporation GS12341 Datasheet HTML 64Page - Semtech Corporation GS12341 Datasheet HTML 65Page - Semtech Corporation GS12341 Datasheet HTML 66Page - Semtech Corporation GS12341 Datasheet HTML 67Page - Semtech Corporation GS12341 Datasheet HTML 68Page - Semtech Corporation Next Button
Zoom Inzoom in Zoom Outzoom out
 64 / 109 page
background image
GS12341
Final Data Sheet
Rev.1
PDS-061928
August 2019
64 of 109
Semtech
Proprietary & Confidential
www.semtech.com
5. Register Map
The host interface on the GS12341 provides users complete control of key features such
as GPIO configuration, PLL loop bandwidth settings, reclock parameters, carrier
detection, cable equalization, bypass modes, output swing controls, mute functions,
pre-emphasis control and many others.
It also includes a wide selection of Status registers which allow the user to read back
several key metrics of information from the GS12341 to add more flexibility to their
designs. Section 5.1 to Section 5.3 cover each Control and Status register in detail.
5.1 Control Registers
Table 5-1: Control Registers
GSPI
Addressh
Register Name
R/W
0
CONTROL_ REG
RW
1
DEVICE_ID
RO
2
RSVD
RW
7F
CONTROL_ RESET
RW
3
CONTROL_ SLEEP
RW
4
MISC_CNTRL
RW
5
MISC_CFG
RW
6
RATE_ DETECT_ MODE
RW
7
RATE_ DETECT_ CFG
RW
Reclocker Configuration
8
RSVD
RW
9
FACTORY_ CDR_ PARAMETERS
RW
0A
PLL_LOOP_ BANDWIDTH_ 0
RW
0B
PLL_LOOP_ BANDWIDTH_ 1
RW
0C
PLL_LOOP_ BANDWIDTH_ 2
RW
0D to 0F
RSVD
RW
GPIO Configuration
10
GPIO0_CFG
RW
11
GPIO1_CFG
RW
12
GPIO2_CFG
RW
13
GPIO3_CFG
RW



Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100  ...More


Datasheet Download

Go To PDF Page


Link URL



Does ALLDATASHEET help your business so far?  [ DONATE ] 

About Alldatasheet   |   Advertisement   |   Contact us   |   Privacy Policy   |   Link to Datasheet    |   Link Exchange   |   Manufacturer List
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com