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10-Bit PHY Interface

2-31

The receive 8B10B PCS section constantly monitors the incoming

10B bitstream. If an /I2/ or /I1/ code is detected, an end of packet

indication is given to the receive MAC and the /I1/ and /I2/ codes are

stripped from the packet.

2.11.6 Receive Word Synchronization

In order to correctly decode the incoming encoded data, the 8B10B PCS

receiver must identify the word boundaries of the incoming data stream.

The process of detecting these word boundaries is referred to as word

synchronization. The receiver uses a state machine compatible with the

algorithm deﬁned in IEEE 802.3z to acquire and maintain word

synchronization. The comma code is used to acquire and maintain

receive word synchronization, as speciﬁed by IEEE 802.3z. The comma

code consists of a unique 7-bit pattern that only appears in the deﬁned

ordered sets shown in Table 2.8, and the comma code does not appear

in the normal data words or across data word boundaries.

When the 8B10B PCS receiver has lost word synchronization, the

EN_CDET pin is asserted to signal the external PHY device. Reading the

RSYNC bit in “Register 11–Status 1‚" Section 4.3.12, also determines

word synchronization.

2.11.7 AutoNegotiation

The AutoNegiotation algorithm uses the /C/ ordered sets, as deﬁned in

Table 2.8, to conﬁgure the link for correct operation. Refer to

Section 2.15, “AutoNegotiation” for more details on this process.

2.12 10-Bit PHY Interface

The 10-bit PHY interface is a standardized interface between the 8B10B

PCS section and an external physical layer device. The 10-bit PHY

interface meets all the requirements outlined in IEEE 802.3z. The

controller can directly connect, without any external logic, to any physical

layer device that also complies with the IEEE 802.3z 10-bit interface

speciﬁcations. The 10-bit PHY interface frame format is deﬁned in

IEEE 802.3z and shown in Figure 2.3.

8104 Datasheet(PDF) 49 Page - LSI Computer Systems