8104 datasheet(13/172 Pages) LSI

13 / 172 page

xiii

Figures

2.1

8101/8104 Block Diagram

2-3

2.2

Ethernet MAC Frame Format

2-4

2.3

Frame Formats and Bit Ordering

2-5

2.4

Little Endian vs. Big Endian Format

2-9

2.5

RXSOF/RXEOF Position

2-13

2.6

AutoNegotiation Data Format

2-39

2.7

Autogenerated Pause Frame Format

2-45

3.1

8101/8104 Interface Diagram

3-2

5.1

Gigabit Ethernet Switch Port Using the 8101/8104

5-2

5.2

Decoupling Recommendations

5-17

6.1

Input Clock Timing

6-4

6.2

Transmit System Interface Timing

6-6

6.3

Receive System Interface Timing

6-8

6.4

Receive System Interface RXABORT Timing

6-9

6.5

Receive System Interface RXOEn Timing

6-9

6.6

System Interface RXDC/TXDC Timing

6-10

6.7

Transmit 10-Bit PHY Interface Timing

6-11

6.8

Receive 10-Bit PHY Interface Timing

6-12

6.9

Read Cycle)

6-14

6.10

(of the Same Counter)

6-15

6.11

(Between Different Counters)

6-16

6.12

8101 208-Pin PQFP Pinout

6-17

6.13

8104 208-Pin BGA Pinout

6-19

6.14

208-Pin PQFP Mechanical Drawing

6-21

6.15

208 mini-BGA (HG) Mechanical Drawing

6-22

8104 Datasheet(PDF) 13 Page - LSI Computer Systems

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