LTC4261 datasheet(39/82 Pages) AD

39 / 82 page

LTC4284

Rev. B

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APPLICATIONS INFORMATION

Figure 18. Use PGIO4/EXT_FAULT to Turn Off

MOSFET when Drain Temperature Exceeds 115°C

Resetting Faults

Faults are reset with any of the following conditions. First,

writing zeros to FAULT register 0x04 will clear the associ-

ated fault bits. Second, the entire FAULT register is cleared

when the ON bit in CONTROL_1 register 0x0A goes from

high to low, or if INTVCC falls below its 3.8V undervolt-

age lockout. EN# falling from high to low also clears the

entire FAULT register. Finally, when UVL is pulled below its

1.024V reset threshold, all fault bits in the FAULT register

are cleared. When UVL is brought back above 1.024V but

below 1.833V, the UV_FAULT bit is set if UVH is below

2.048V. This can be avoided by holding UVH above

2.048V while toggling UVL to reset faults.

Fault bits with associated fault conditions that are still

present (as indicated in FAULT_STATUS register 0x03)

cannot be cleared. The FAULT register will not be cleared

when auto-retrying. When auto-retry of a specific GATE

turn-off fault is disabled using CONTROL_2 register 0x0B,

the existence of the associated fault bit keeps the MOSFET

off. After the fault bit is cleared and the associated retry

delay expires, the MOSFETs are allowed to turn on again.

If auto-retry of a fault is enabled, then a high state of the

associated fault status bit in 0x03 will hold the MOSFETs

off and the FAULT register is ignored. Subsequently, when

the condition causing the fault is cleared (and so is the

fault status bit in 0x03), the MOSFETs are allowed to turn

on again.

Alarms

Besides the fault bits and the EN#_CHANGED bit, the

LTC4284 also logs ADC alarms in ADC_ALARM_LOG

registers 0x05-0x09 when ADC results are higher than

the pre-configured MAX thresholds or lower than the

10nF

RTH*

470 at 25°C

4.7k at 115°C

13.7k

INTVCC

LTC4284

VEE

PGIO4

TDK/EPCOS

B59421A0115A062

*RTH PLACED NEAR MOSFET DRAIN

4284 F18

PGIO4_CONFIG = 01b

EXTFLT_TURN_OFF = 1

pre-configured MIN thresholds. In addition, when the tick

counter or energy meter overflows, the TICK_OVERFLOW

bit or METER_OVERFLOW bit is logged into METER_

CONTROL register 0x84. Finally, when EEPROM is writ-

ten through I2C, the EEPROM_WRITTEN bit is logged into

ADC_ALARM_LOG register 0x05. Similar to the fault bits,

these alarm bits indicate the history of corresponding

conditions and do not reflect the present status of the

conditions. Any alarm bit can only be reset by two meth-

ods: writing a zero to the alarm bit using I2C or bringing

INTVCC below its undervoltage lockout voltage.

EN# Pin

EN# has a 1.28V logic threshold relative to VEE with a

maximum leakage current of 1μA at 3V. It must be pulled

low and remain low during the 128ms debounce delay.

When the delay expires, the MOSFETs are allowed to turn-

on. An internal clamp limits EN# to a minimum of 6V. The

pin can be safely connected to higher voltages through a

resistor that limits the current up to 5mA. It can be used

to monitor board present as shown in Figure 2.

The EN# bit in SYSTEM_STATUS register 0x00 indicates

the present state of EN#, and the EN#_CHANGED bit in

ADC_ALARM_LOG_1 register 0x05 is set high whenever

EN# changes state. The EN#_CHANGED bit can be cleared

using the same methods as those for resetting faults (see

Resetting Faults) except pulling EN# from high to low.

Pulling EN# from high to low sets the EN#_CHANGED bit

while clearing the entire FAULT register 0x04.

ON Bit

The ON bit in CONTROL_1 register 0x0A allows one to

turn on (ON bit = 1) and turn off (ON bit = 0) the MOSFETs

through the I2C interface. There is no debounce delay

associated with this bit, so the MOSFETs are immediately

turned on after the bit is flipped from 0 to 1 while all other

turn-on conditions are met.

When the ON bit is changed from 1 to 0, the MOSFETs

are turned off and all bits in FAULT register 0x04 plus the

EN#_CHANGED bit in ADC_ALARM_LOG_1 register 0x05

are cleared.

LTC4261 Datasheet(PDF) 39 Page - Analog Devices

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