LTC4282 datasheet(4/32 Pages) AD

4 / 32 page

LTC4238

Rev. 0

For more information www.analog.com

SYMBOL

PARAMETER

CONDITIONS

MIN

TYP

MAX

UNITS

VFETBAD(TH)

VDD – SOURCE FET-Bad Threshold

100

120

VSTRESS(TH)

VDD – SOURCE Low Stress Threshold

1.6

2.4

ISOURCE

SOURCE Input Current

VSOURCE = 48V

300

µA

tDL(UV)

Debounce Turn-On Propagation Delay

UV Turn-On

tDL(OV)

Turn-On Propagation Delay

OV Turn-On

µs

tDL(PG)

Power Good Delay

µs

VCONFIG1/2

Input High Threshold

INTVCC

– 0.8

INTVCC

– 0.5

INTVCC

– 0.2

Input Low Threshold

0.2

0.5

0.8

ICONFIG

CONFIG Sink or Source Current

CONFIG = 0 to INTVCC

±20

µA

VISET(TH)

ISET Threshold Error

(Note 4)

±150

IISET

ISET Input Current

V = 0, 5V

±1

µA

Other Pin and Functions

VOL

PG, FLT# Output Low Voltage

I = 2mA

0.3

0.4

IOH

PG, FLT# Leakage Current

V = 80V

±1

µA

RVDSFB

Resistance Between VDD and VDSFB Pins

Gate On

120

150

kΩ

IVDSFB

VDSFB Input Current

Gate Off

±1

µA

ICOMM

COMM Source Current

V = 2.5V, Gate On and in Current Limit

–3.5

–5

–6.5

µA

COMM Sink Current

V = 2.5V, Gate Off

VCOMM(SERVO)

COMM Servo Voltage

LSSS Start-Up

0.35

0.8

0.9

Gate Fully On, Not in Current Limit

2.3

2.5

2.7

VCOMM(TH)

COMM High Threshold

In Current Limit

INTVCC

– 2

INTVCC

– 1.5

INTVCC

– 0.85

COMM Low Threshold

Gates On, Not in LSSS

0.9

1.4

1.9

COMM LSSS Threshold

Gate On, in LSSS

0.1

0.2

0.3

VTMR(H)

TMR, TMRFET High Threshold

Rising (Note 5)

2.50

2.56

2.62

VTMR(L)

TMR, TMRFET Low Threshold

Falling (Note 5)

0.16

0.2

0.24

ITMR(UP)

TMR (ILIM), TMRFET Pull Up Current

VTIMER = 0V

–16.5

–20

–22

µA

TMR (SOA) Pull Up Current

ΔVSNS = 0V and VDD – VVDSFB = 0V

±1

µA

ΔVSNS = 10mV and VDD – VVDSFB = 6V

–90

–100

–110

µA

ΔVSNS = 20mV and VDD – VVDSFB = 50mV l

–2.5

–1.4

µA

ITMR(DN)

TMR(ILIM) Pull Down Current

VTMR = 2.56V

µA

ITMRFET(DN)

TMRFET Pull Down Current

VTMRFET = 2.56V

0.2

0.5

0.8

DOC

Overcurrent Auto-Retry Duty Cycle

0.04

0.08

0.12

DFETBAD

FETBAD Auto-Retry Duty Cycle

0.8

1.6

2.4

Note 1: Stresses beyond those listed under Absolute Maximum Ratings

may cause permanent damage to the device. Exposure to any Absolute

Maximum Rating condition for extended periods may affect device

reliability and lifetime.

Note 2: All currents into pins are positive. All voltages are referenced to

GND unless otherwise specified.

ELECTRICAL CHARACTERISTICS The

denotes the specifications which apply over the full operating

temperature range, otherwise specifications are at TA = 25°C. VDD = 48V unless otherwise noted.

Note 3: Internal clamps limit the GATE pin to a minimum of 10V above or

0.3V below SOURCE. Driving this pin to voltages beyond the clamp may

damage the device.

Note 4: See Table 1 for more details.

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