LTC4282 datasheet(12/32 Pages) AD

12 / 32 page

LTC4238

Rev. 0

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APPLICATIONS INFORMATION

foldback profile as shown in Figure 2. As the SOURCE

voltage rises, the VDSFB and FB pins follow as set by R6,

R7 and R8. Once the MOSFET drain to source voltage is

lower than its 2V threshold, both GATE pins are higher

than their 8V thresholds, and the FB pin has exceeded its

The MOSFETs are turned off with 10mA from GATE to

SOURCE and with 1mA currents pulling the GATE pins to

ground. With the MOSFET turned off, the SOURCE and FB

voltages drop as the load capacitance discharges. When

the FB voltage crosses below its threshold, PG pulls low

to indicate that the output power is no longer good. If

the VDD pin falls below 5.5V or INTVCC drops below the

undervoltage lockout falling threshold of 3.89V, a fast

shut down of the MOSFET is initiated. The GATE pins are

then pulled down with 0.8A currents to the SOURCE pin.

Overcurrent Protection

The LTC4238 features two levels of protection from short-

circuit and overcurrent conditions. Load current is moni-

tored by the SENSE+ and SENSE– pins across the current

sense resistors. There are two distinct thresholds for the

current sense voltages, an active current limit threshold

and a fast current limit comparator threshold. The fast

current limit comparator threshold is always three times

the nominal current limit threshold. If the sense volt-

age of a channel reaches the current limit threshold, the

corresponding GATE is pulled down until the associated

active current limit loop is engaged. In the event of a cata-

strophic short-circuit or a sudden input step, where the

sense voltage of a channel reaches the fast current limit

comparator threshold, the corresponding GATE is imme-

diately pulled to SOURCE to limit peak current through

the MOSFET. When the sense voltage drops to the current

limit threshold, the active current limit loop is engaged.

Current Limit Foldback

The LTC4238 features an adjustable current limit with

foldback that protects the MOSFETs from excessive power

dissipation. During active current limiting, the available

current is reduced as a function of the voltage across

MOSFET sensed by VDD and VDSFB pins. The higher the

voltage across MOSFET, the lower the current limit thresh-

old will be. The lowest foldback value after start-up is 30%

of the nominal voltage.

The nominal voltage of the LTC4238 current limit thresh-

old is set between 6mV and 20mV in 2mV steps via the

ISET pin (Table 1). This can be used to achieve a given

current limit with the limited selection of standard sense

2.56V threshold, then the PG pin releases high to indicate

power is good and the load may be activated.

In normal operation, the minimum GATE-to-SOURCE

(ΔVGATE) drive voltage is 10V. The ΔVGATE voltage is

clamped below 14V to protect the gates of 20V N-channel

MOSFETs. A curve of ΔVGATE drive versus VDD is shown

in the typical performance characteristics.

Turn-Off Sequence

A normal turn-off sequence is initiated by card removal

when the backplane connector short pin opens, caus-

ing the UV or OV comparator output to change state.

Additionally, several fault conditions can turn off the

GATEs. These include an input overvoltage, input under-

voltage, overcurrent or FET-bad fault.

Figure 2. Power-Up Waveforms

VGS = 8V

LIMITED POWER

CURRENT

LIMITED

MOSFET POWER

30%

100%

POWER GOOD

VGATE

ILOAD • RS

4238 F02

VDD + 12V

VDD + 8V

VDD – VOUT

VSENSE

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