LTC4282 datasheet(11/32 Pages) AD

11 / 32 page

LTC4238

Rev. 0

For more information www.analog.com

APPLICATIONS INFORMATION

A typical LTC4238 application is a high availability system

in which a positive voltage supply is distributed to power

individual hot-swapped cards.

In the following sections, the parallel mode is first cho-

sen to demonstrate common functions and basic hot-

swap applications. The unique features and applications

of each operation mode are then described separately. A

basic 48V, 40A LTC4238 application circuit is shown in

Figure 1. The power supply on a board is controlled by

using two pairs of N-channel pass transistors, M1A-B

and M2A-B, placed in the power path. Resistors RS1 and

RS2 sense current through M1A-B and M2A-B. Resistors

R1, R2 and R3 define undervoltage and overvoltage lev-

els. RG1-4 prevent high frequency self-oscillations in the

MOSFETs. R7 and R8 set the power good threshold, and

R6 scales current limit foldback to the intended operating

voltage.

The following sections cover turn-on, turn-off and various

faults that the LTC4238 detects and acts upon. External

component selection is discussed in detail in the Design

Examples section.

Turn-On Sequence

Several conditions must be met before the external

MOSFETs turn on. First the external supply, VDD, must

exceed its 6.0V undervoltage lockout level. Next, the inter-

nally generated supply, INTVCC, must cross its 4V under-

voltage threshold. This generates a power-on-reset pulse.

After a power-on-reset pulse, the UV and OV pins verify

that input power is within the acceptable range. The state

of the UV comparator must be stable for at least 40ms to

qualify for turn-on. The MOSFETs are then turned on by

charging up the GATE pins with 50μA current sources.

When the GATE voltage reaches the MOSFET threshold

voltage, the MOSFET begins to turn on and the SOURCE

voltage then follows the GATE voltages as it increases.

While the MOSFETs are turning on, the power dissipa-

tion in current limit for each MOSFET is limited to the

Figure 1. 48V, 40A Hot Swap Controller with SOA Timer in Parallel Mode

0.5m

M1A

RG1

M2A

PSMN3R7-100BSE

RG2

360k

93.1k

3.01k

4.22k

0.1µF

CFET

62nF

62k

5.23k

CE1

6.8nF

CE2

56nF

RE1

1.82k, 1%

RTOP

73.2k

RBOTTOM

29.4k

0.1µF

M1B

RG3

M2B

PSMN3R7-100BSE

RG4

FLT#

TMR

VDD

CONFIG1

SENSE1–

SENSE1+

GATE1

SENSE2–

GATE2 SOURCE VDSFB

COMM

LTC4238

SENSE2+

ISET

CONFIG2

INTVCC

TMRFET

GND

48V

GND

VOUT

48V

BACKPLANE PLUG-IN

BOARD

40A

SMC5K60A

×3

RS1

RS2

CE3

680nF

RE3

750k

4238 F01

RE2

22.6k, 1%

PSMN3R7-100BSE

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