LTC4282 datasheet(7/32 Pages) AD

7 / 32 page

LTC4238

Rev. 0

For more information www.analog.com

PIN FUNCTIONS

COMM: Communication Input/Output. Coordinates turn

on, turn off, and overcurrent faults between parts. Directly

connect the COMM pins of a group of parts to operate

them together. COMM may also be used as an ON status

or current limit status indicator. May be pulled to ground

with an open drain output to turn off the part. Leave open

if unused.

CONFIG1, CONFIG2: Three State Configuration Inputs.

Decoded to select one of nine possible configurations.

These include single FET, High Stress Staged Start (HSSS),

Parallel or Low Stress Staged Start (LSSS) modes, cur-

rent limit profile and timer type for TMR pin (see Table 3).

FB: Power Good Comparator Input. Connect this pin to

an external resistive divider from SOURCE to GND. If the

FB voltage falls below 2.48V, the PG pin will pull low to

indicate the power is bad.

FLT#: Over Current or FET Bad Fault Output. An open drain

output that pulls low when the FET bad timer or current

limit/SOA timer expires. Tie FLT# and UV together through

a resistor to INTVCC to enable auto-retry (see Applications

Information for details).

GATE1, GATE2: Gate Drives for External N-Channel

MOSFETs. Internal 50µA current sources charge the gates

of the MOSFETs. No compensation capacitors are required

on the GATE pins, but a resistor-capacitor (RC) network

from these pins to ground may be used to set the turn-on

output voltage slew rate. During turn-off there is a 10mA

pull-down current to SOURCE and a 1mA pull-down cur-

rent to GND. During a short-circuit or undervoltage lock-

out (VDD or INTVCC), a 0.8A pull-down between GATE1/

GATE2 and SOURCE is activated. If only one MOSFET is

used, leave the GATE2 pin open and connect SENSE2+

and SENSE2– to VDD.

GND: Device Ground.

INTVCC: Internal Supply Decoupling Output. Connect a

capacitor no smaller than 0.1µF from this pin to ground.

Up to 10mA may be drawn from this pin to power appli-

cation circuitry. This pin is current limited and will drop

to GND to reduce heating in an overcurrent condition.

Overloading this pin can disrupt internal operation. This

pin can be driven by an external supply that can only

source, but not sink current.

ISET: Current Limit Adjustment Input. The ISET voltage

is compared with seven threshold voltages generated by

a resistive voltage divider from INTVCC. The result sets

the current limit voltage to be one of eight discrete values

from 6mV to 20mV in 2mV increments. When ISET is

connected to ground, the current limit threshold is set

to 6mV. When ISET is connected to INTVCC, current limit

threshold is set to 20mV (see Table 1).

NC: No Connection. Not Internally connected.

OV: Overvoltage Comparator Input. Connect OV to an

external resistive voltage divider from VDD to GND. An

overvoltage fault is detected if this pin rises above the

2.56V threshold. When the OV pin voltage falls back below

the 2.51V falling threshold, the GATE pins will turn on

again immediately. Tie to GND if unused.

PG: Power Good Output. An open drain output that

pulls low when the FB pin drops below 2.48V indicat-

ing the power is bad. If the FB pin rises above 2.56V,

VDD – VSOURCE is lower than 2V, and the GATEs are fully

enhanced, the open-drain pull-down releases the PG to

go high.

SENSE1+, SENSE2+: Positive Kelvin Current Sense Input.

Connect these pins to the VDD side of the current sense

resistor(s).

SENSE1–, SENSE2–: Negative Kelvin Current Sense Input.

Connect this pin to the MOSFET side of the current sense

resistor(s). The current limit circuit controls the GATE

pin to limit the sense voltage between the SENSE+ and

SENSE– pins to the value selected by the ISET pin or less;

depending on the voltage at the VDSFB pin. Tie SENSE2– to

VDD when unused.

SOURCE: N-Channel MOSFET Source Connection.

Connect this pin to the source of the external N-channel

MOSFET switch. This pin provides a return for the gate

pull-down circuit and is used as an input to the 100mV

and 2V VDS comparators which are used for FET-BAD

faults and staged start timing, respectively.

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