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ADP2140 Datasheet(PDF) 24 Page - Analog Devices

Part # ADP2140
Description  3 MHz, 600 mA, Low Quiescent Current Buck with 300 mA LDO Regulator
PDF  32 Pages
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Manufacturer  AD [Analog Devices]
Direct Link  http://www.analog.com
Logo AD - Analog Devices

ADP2140 Datasheet(HTML) 24 Page - Analog Devices

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ADP2140
Data Sheet
Rev. B | Page 24 of 32
CH1 500mV
CH2 500mV
M40.0µs
A CH3
1.16V
T 10.00%
CH3 2.00V
1
2
3
T
LDO OUTPUT
BUCK OUTPUT
EN1
Figure 84. Individual Activation Mode, EN1 and EN2 Pins Tied Together
POWER-GOOD FUNCTION
The ADP2140 power-good (PG) pin indicates the state of the
monitored output voltages. The PG function is the logical AND
of the state of both outputs. The PG function is an active high,
open-drain output, requiring an external pull-up resistor typically
supplied from the I/O supply rail, as shown in . When the sensed
output voltages are below 92% of their nominal value, the PG pin is
held low. When the sensed output voltages rise above 92% of
the nominal levels, the PG line is pulled high after tRESET. The
PG pin remains high as long as the sensed output voltages are
above 86% of the nominal output voltage levels.
The typical PG delay when the buck is in PWM mode is 5 ms.
When the part is in PSM mode, the PG delay is load dependent
because the internal clock is disabled to reduce quiescent current
during the sleep stage. PG delay varies from hundreds of micro-
seconds at 10 mA, up to seconds at current loads of less than 10 μA.
CH1 2.00V
CH2 2.00V
CH4 2.00V
M2.00ms
A CH1
2.20V
T 10.20%
CH3 2.00V
1
2
3
4
T
EN1
BUCK
LDO
PG
Figure 85. Typical PG Timing
EXTERNAL COMPONENT SELECTION
The external component selection for the ADP2140 application
circuit that is shown in Table 8, Table 9, and Figure 86 is
dependent on input voltage, output voltage, and load current
requirements. Additionally, trade-offs between performance
parameters such as efficiency and transient response can be
made by varying the choice of external components.
SELECTING THE INDUCTOR
The high frequency switching of the ADP2140 allows the selection
of small chip inductors. The inductor value affects the transition
between CFM to PSM, efficiency, output ripple, and current limit
values. Use the following equation to calculate the inductor ripple
current:
L
f
V
V
V
V
I
sw
IN
OUT
IN
OUT
L
×
×
−
×
=
)
(
Δ
where:
fSW is the switching frequency (3 MHz typical).
L is the inductor value.
The dc resistance (DCR) value of the selected inductor affects
efficiency, but a decrease in this value typically means an increase
in root mean square (rms) losses in the core and skin. As a
minimum requirement, the dc current rating of the inductor
should be equal to the maximum load current plus half of the
inductor current ripple, as shown by the following equation:
)
2
Δ
(
)
(
L
MAX
LOAD
PK
I
I
I
+
=
OUTPUT CAPACITOR
Output capacitance is required to minimize the voltage over-
shoot and ripple present on the output. Capacitors with low
equivalent series resistance (ESR) values are recommended to
produce low output ripple. For good stability over temperature,
use capacitors such as the X5R or X7R dielectric. Do not use the
Y5V and Z5U capacitors; they are not suitable for this application
because of their large variation in capacitance over temperature
and dc bias voltage. The minimum output capacitance (COUT_MIN)
is determined by the following VRIPPLE and COUT_MIN equations.
For acceptable maximum output voltage ripple,
VRIPPLE = ΔIL × (ESRCOUT + 1/(8 × fSW × COUT_MIN))
Therefore,
COUT_MIN = ΔIL/(8 × fSW × (VRIPPLE − ΔIL × ESRCOUT))
where:
VRIPPLE is allowable peak-to-peak output voltage ripple in V.
ΔIL is the inductor ripple current in A.
ESRCOUT is the equivalent series resistance of the capacitor in Ω.
fSW is the converter switching frequency in Hz.
Increasing the output capacitor has no effect on stability and
increasing the output capacitance may further reduce output
ripple and enhance load transient response. When choosing this
value, it is also important to account for the loss of capacitance
due to output voltage dc bias. For recommended 10 μF
capacitors, please refer to Table 9.
INPUT CAPACITOR
Input capacitance is required to reduce input voltage ripple; there-
fore, place the input capacitor as close as possible to the VINx pins.
As with the output capacitor, a low ESR X7R- or X5R-type
capacitor is recommended to help minimize the input voltage



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