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CP3UB26 Datasheet(PDF) 23 Page - National Semiconductor (TI) |
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CP3UB26 Datasheet(HTML) 23 Page - National Semiconductor (TI) |
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23 / 268 page ![]() 23 www.national.com STORMP imm3 Store 1 to 8 registers (R2-R5, R8-R11) to memory starting at (R7,R6) DI Disable maskable interrupts EI Enable maskable interrupts EIWAIT Enable maskable interrupts and wait for interrupt NOP No operation WAIT Wait for interrupt Table 5 Instruction Set Summary Mnemonic Operands Description |
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