CP3UB26 datasheet(65/268 Pages) NSC

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13.1.11 Wake-Up Pending Register (WK0PND)

The WK0PND register is a word-wide read/write register in

which the Multi-Input Wake-Up module latches any detect-

ed trigger conditions. The CPU can only write a 1 to any bit

position in this register. If the CPU attempts to write a 0, it

has no effect on that bit. To clear a bit in this register, the

CPU must use the WK0PCL register. This implementation

prevents a potential hardware-software conflict during a

read-modify-write operation on the WK0PND register.

This register is cleared upon reset. The register format is

shown below.

WKPD

The Wake-Up Pending bits indicate which

MIWU channels have been triggered. The

WKPD15:0 bits correspond to the WUI15:0

channels. Writing 1 to a bit sets it.

– Trigger condition did not occur.

– Trigger condition occurred.

13.1.12 Wake-Up 1 Pending Register (WK1PND)

The WK1PND register is a word-wide read/write register in

which the Multi-Input Wake-Up module latches any detect-

ed trigger conditions. The CPU can only write a 1 to any bit

position in this register. If the CPU attempts to write a 0, it

has no effect on that bit. To clear a bit in this register, the

CPU must use the WK1PCL register. This implementation

prevents a potential hardware-software conflict during a

read-modify-write operation on the WK1PND register.

This register is cleared upon reset. The register format is

shown below.

WKPD

The Wake-Up Pending bits indicate which

MIWU channels have been triggered. The

WKPD15:0 bits correspond to the WUI31:15

channels. Writing 1 to a bit sets it.

– Trigger condition did not occur.

– Trigger condition occurred.

13.1.13 Wake-Up Pending Clear Register (WK0PCL)

The WK0PCL register is a word-wide write-only register that

lets the CPU clear bits in the WKPND register. Writing a 1

to a bit position in the WKPCL register clears the corre-

sponding bit in the WKPND register. Writing a 0 has no ef-

fect. Do not modify this register with instructions that access

the register as a read-modify-write operand, such as the bit

manipulation instructions.

Reading this register location returns undefined data.

Therefore, do not use a read-modify-write sequence (such

as the SBIT instruction) to set individual bits. Do not attempt

to read the register, then perform a logical OR on the regis-

ter value. Instead, write the mask directly to the register ad-

dress. The register format is shown below.

WKCL

Writing 1 to a bit clears it.

– Writing 0 has no effect.

– Writing 1 clears the corresponding bit in

the WKPD register.

13.1.14 Wake-Up 1 Pending Clear Register (WK1PCL)

The WK1PCL register is a word-wide write-only register that

lets the CPU clear bits in the WK1PND register. Writing a 1

to a bit position in the WK1PCL register clears the corre-

sponding bit in the WK1PND register. Writing a 0 has no ef-

fect. Do not modify this register with instructions that access

the register as a read-modify-write operand, such as the bit

manipulation instructions.

Reading this register location returns undefined data.

Therefore, do not use a read-modify-write sequence (such

as the SBIT instruction) to set individual bits. Do not attempt

to read the register, then perform a logical OR on the regis-

ter value. Instead, write the mask directly to the register ad-

dress. The register format is shown below.

WKCL

Writing 1 to a bit clears it.

– Writing 0 has no effect.

– Writing 1 clears the corresponding bit in

the WK1PD register.

WKPD

WKCL

CP3UB26 Datasheet(PDF) 65 Page - National Semiconductor (TI)

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