AD9161BBCZ datasheet(93/144 Pages) AD

93 / 144 page

Data Sheet

AD9161/AD9162

Rev. D | Page 93 of 144

Hex.

Addr. Name

Bits Bit Name

Settings

Description

Reset

Access

0x034 SYNC_LMFC_STAT0

[7:0] SYNC_LMFC_DELAY_STAT[7:0]

Measured delay from rising

edge of SYSREF± input to rising

edge of LMFC in DAC clock

units (note: 2 LSBs are always

zero). A write to

SYNC_LMFC_STATx or

SYSREF_PHASEx saves the data

for readback.

0x0

R/W

0x035 SYNC_LMFC_STAT1

[7:4] RESERVED

Reserved.

0x0

[3:0] SYNC_LMFC_DELAY_STAT[11:8]

Measured delay from rising

edge of SYSREF± input to rising

edge of LMFC in DAC clock

units (note: 2 LSBs are always

zero). A write to

SYNC_LMFC_STATx or

SYSREF_PHASEx saves the data

for readback.

0x0

R/W

0x036 SYSREF_COUNT

[7:0] SYSREF_COUNT

Count of SYSREF± signals

received. A write resets the

count. A write to

SYNC_LMFC_STATx or

SYSREF_PHASEx saves the data

for readback.

0x0

R/W

0x037 SYSREF_PHASE0

[7:0] SYSREF_PHASE[7:0]

Phase of measured SYSREF±

event. Thermometer encoded.

A write to SYNC_LMFC_STATx

or SYSREF_PHASEx saves the

data for readback.

0x0

R/W

0x038 SYSREF_PHASE1

[7:4] RESERVED

Reserved.

0x0

[3:0] SYSREF_PHASE[11:8]

Phase of measured SYSREF±

event. Thermometer encoded.

A write to SYNC_LMFC_STATx

or SYSREF_PHASEx saves the

data for readback.

0x0

R/W

0x039 SYSREF_JITTER_WINDOW

[7:6] RESERVED

Reserved.

0x0

[5:0] SYSREF_JITTER_WINDOW

Amount of jitter allowed on the

SYSREF± input. SYSREF± jitter

variations bigger than this

triggers an interrupt. Units are

in DAC clocks. The bottom two

bits are ignored.

0x0

R/W

0x03A SYNC_CTRL

[7:2] RESERVED

Reserved.

0x0

[1:0] SYNC_MODE

Synchronization mode.

0x0

R/W

00 Do not perform

synchronization, monitor

SYSREF± to LMFC delay only.

01 Perform continuous

synchronization of LMFC on

every SYSREF±.

10 Perform a single

synchronization on the next

SYSREF±, then switch to

monitor mode.

0x03F TX_ENABLE

SPI_DATAPATH_POST

SPI control of the data at the

output of the datapath.

0x1

R/W

0 Disable or zero the data from

the datapath into the DAC.

1 Use the data from the datapath

to drive the DAC.

AD9161BBCZ Datasheet(PDF) 93 Page - Analog Devices

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