AD9161BBCZ datasheet(105/144 Pages) AD

105 / 144 page

Data Sheet

AD9161/AD9162

Rev. D | Page 105 of 144

Hex.

Addr. Name

Bits Bit Name

Settings

Description

Reset

Access

[3:0] SPI_EQ_CONFIG6

0x8

R/W

0000 Manual mode (SPI configured

values used).

0001 Boost level = 1.

0010 Boost level = 2.

0011 Boost level = 3.

0100 Boost level = 4.

0101 Boost level = 5.

0110 Boost level = 6.

0111 Boost level = 7.

1000 Boost level = 8.

1001 Boost level = 9.

1010 Boost level = 10.

1011 Boost level = 11.

1100 Boost level = 12.

1101 Boost level = 13.

1110 Boost level = 14.

1111 Boost level = 15.

0x268 EQ_BIAS_REG

[7:6] EQ_POWER_MODE

Controls the equalizer power

mode/insertion loss capability.

0x1

R/W

00 Normal mode.

01 Low power mode.

[5:0] RESERVED

Reserved.

0x4

R/W

0x280 SYNTH_ENABLE_CNTRL

[7:3] RESERVED

Reserved.

0x0

SPI_RECAL_SYNTH

Set this bit high to rerun all of

the SERDES PLL calibration

routines. Set this bit low again

to allow additional

recalibrations. Rising edge

causes the calibration.

0x0

R/W

RESERVED

Reserved.

0x0

R/W

SPI_ENABLE_SYNTH

Enable the SERDES PLL. Setting

this bit turns on all currents and

proceeds to calibrate the PLL.

Make sure reference clock and

division ratios are correct

before enabling this bit.

0x0

R/W

0x281 PLL_STATUS

[7:6] RESERVED

Reserved.

0x0

SPI_CP_OVER_RANGE_HIGH_RB

If set, the SERDES PLL CP output

is above valid operating range.

0x0

0 Charge pump output is within

operating range.

1 Charge pump output is above

operating range.

SPI_CP_OVER_RANGE_LOW_RB

If set, the SERDES PLL CP output

is below valid operating range.

0x0

0 Charge pump output is within

operating range.

1 Charge pump output is below

operating range.

SPI_CP_CAL_VALID_RB

This bit tells the user if the

charge pump calibration has

completed and is valid.

0x0

0 Charge pump calibration is not

valid.

1 Charge pump calibration is

valid.

[2:1] RESERVED

Reserved.

0x0

AD9161BBCZ Datasheet(PDF) 105 Page - Analog Devices

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