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AD8065 Datasheet(PDF) 5 Page - Analog Devices |
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AD8065 Datasheet(HTML) 5 Page - Analog Devices |
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5 / 68 page  Data Sheet AD3552R SPECIFICATIONS analog.com Rev. A | 5 of 68 Table 3. Parameter1 Min Typ Max Unit Test Conditions/Comments 7.6 µVRMS RFB2_x 15.4 µVRMS RFB4_x Total Harmonic Distortion −105 dB 0 V to 5 V range, fOUT = 1 kHz −101 dB fOUT = 10 kHz −84 dB fOUT = 100 kHz SFDR −105 dB 0 V to 5 V range, fOUT = 1 kHz 1 See the Terminology section. TIMING CHARACTERISTICS VDD = 5.0 V ± 5%, DVDD = 1.8 V ± 5%, 1.1 V ≤ VLOGIC ≤ 1.9 V, −40°C ≤ TA ≤ +105°C, unless otherwise noted. Table 4. Parameter 1,2 Description Min Typ Max Unit Test Conditions / Comments fSCLK SCLK frequency 66 MHz t1 SCLK cycle time 15.2 ns tSCLK/2 SCLK half period 7.6 ns t2 CS falling edge to first SCLK rising edge 5 ns t3 Last SCLK sampling edge3 to CS rising edge 10 ns t4 CS falling edge from SCLK sampling edge ignored 5 ns t5 CS rising edge to SCLK rising edge ignored 5 ns t6 Minimum CS high time 10 ns t7 Data setup time 2 ns t8 Data hold time 2 ns t9 SCLK falling edge to SDO data valid 15 ns 1.7 < VLOGIC < 1.9 25 ns 1.1 < VLOGIC < 1.7 t10 SCLK sampling edge to LDAC falling edge 7.6 ns t11 LDAC pulse width low 7.6 ns t12 CS rising edge to SDO disabled 50 ns t13 LDAC rising edge to CS falling edge 5 ns t14 RESET pulse width low 10 ns t14 to t19 shown in Figure 12 t15 RESET pulse activation time 100 ns t16 VOUT Update from CHx_DAC Register Write 12.6 ns t17 VOUT update from LDAC falling edge 5 ns t184 Wait time before DAC register access 100 ms t195 Shutdown exit time 5 ms Update Rate Quad SPI mode, DDR and streaming enabled, precision mode 22 MUPS6 Quad SPI mode, DDR and streaming enabled, fast mode 33 MUPS6 1 All input signals are specified with tR = tF = 1 ns/V (10% to 90%) and timed from a voltage level of (VIL + VIH)/2. 2 Guaranteed by design and characterization, not production tested. 3 The SCLK sampling edge refers to the SCLK edge where the data is read in (sampled) 4 Same timing must be expected at power-up from the instant that AVDD = 4 V or DVDD = 0.8 V. 5 Time required to exit power-down to normal mode. 6 MUPS is mega updates per second. |
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