AD8065 datasheet(56/68 Pages) AD

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Data Sheet

AD3552R

REGISTERS

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Rev. A | 56 of 68

Channel 0 Gain Register

Address: 0x1C, Reset: 0x00, Name: CH0_GAIN

This register enables the configuration of custom span modes, configures the scaling of the PMOS DAC and NMOS DAC current sources, and

controls the polarity of the offset value.

Table 40. Bit Descriptions for CH0_GAIN

Bits

Bit Name

Settings

Description

Reset

Access

CH0_RANGE_OVERRIDE

Channel 0 Range Override. This bit allows the user to override the

preconfigured range settings and manually set offset and gain.

0x0

R/W

0 Use preconfigured range settings.

1 Use custom range settings.

[6:5]

CH0_GAIN_SCALING_N

Channel 0 NMOS DAC Gain Scaling. This field controls the multiplying

factor for the codes applied to the NMOS DAC current sources.

0x0

R/W

00 Gain scaling 1.

01 Gain scaling 0.5.

10 Gain scaling 0.25.

11 Gain scaling 0.125.

[4:3]

CH0_GAIN_SCALING_P

Channel 0 PMOS DAC Gain Scaling. This field controls the multiplying

factor for the codes applied to the PMOS DAC current sources.

0x0

R/W

00 Gain scaling 1.

01 Gain scaling 0.5.

10 Gain scaling 0.25.

11 Gain scaling 0.125.

CH0_OFFSET_POLARITY

Channel 0 Offset Polarity. This bit sets the polarity of the offset.

0x0

R/W

0 Positive offset.

1 Negative offset.

[1:0]

RESERVED

Reserved.

0x0

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