AD8065 datasheet(57/68 Pages) AD

57 / 68 page

Data Sheet

AD3552R

REGISTERS

analog.com

Rev. A | 57 of 68

Channel 1 Offset Register

Address: 0x1D, Reset: 0x00, Name: CH1_OFFSET

This register configures the dc offset of the Channel 0 DAC. For this value to take effect, the CH1_RANGE_OVERRIDE bit must be set in the

CH1_GAIN register.

Table 41. Bit Descriptions for CH1_OFFSET

Bits

Bit Name

Settings

Description

Reset

Access

[7:0]

CH1_OFFSET

Channel 1 DC Offset.

0x0

R/W

Channel 1 Gain Register

Address: 0x1E, Reset: 0x00, Name: CH1_GAIN

This register enables the configuration of custom span modes, configures the scaling of the PMOS DAC and NMOS DAC current sources, and

controls the polarity of the offset value.

Table 42. Bit Descriptions for CH1_GAIN

Bits

Bit Name

Settings

Description

Reset

Access

CH1_RANGE_OVERRIDE

Channel 1 Range Override. This bit allows the user to override the

preconfigured range settings and manually set offset and gain.

0x0

R/W

0 Use preconfigured range settings.

1 Use custom range settings.

[6:5]

CH1_GAIN_SCALING_N

Channel 1 NMOS DAC Gain Scaling. This field controls the multiplying

factor for the codes applied to the NMOS DAC current sources.

0x0

R/W

00 Gain scaling 1.

01 Gain scaling 0.5.

10 Gain scaling 0.25.

11 Gain scaling 0.125.

[4:3]

CH1_GAIN_SCALING_P

Channel 1 PMOS DAC Gain Scaling. This field controls the multiplying

factor for the codes applied to the PMOS DAC current sources.

0x0

R/W

00 Gain scaling 1.

01 Gain scaling 0.5.

AD8065 Datasheet(PDF) 57 Page - Analog Devices

AD8065 Datasheet(HTML) 57 Page - Analog Devices

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68

Datasheet Download

Link URL