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MPC850EC Datasheet(PDF) 61 Page - NXP Semiconductors |
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MPC850EC Datasheet(HTML) 61 Page - NXP Semiconductors |
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61 / 72 page ![]() MPC850 PowerQUICC™ Integrated Communications Processor Hardware Specifications, Rev. 2 Freescale Semiconductor 61 CPM Electrical Characteristics Figure 60. SPI Slave (CP = 1) Timing Diagram 8.11 I2C AC Electrical Specifications Table 24 provides the I2C (SCL < 100 KHz) timings. Table 24. I2C Timing (SCL < 100 KHZ) Num Characteristic All Frequencies Unit Min Max 200 SCL clock frequency (slave) 0.00 100.00 KHz 200 SCL clock frequency (master) 1 1.50 100.00 KHz 202 Bus free time between transmissions 4.70 — µs 203 Low period of SCL 4.70 — µs 204 High period of SCL 4.00 — µs 205 Start condition setup time 4.70 — µs 206 Start condition hold time 4.00 — µs 207 Data hold time 0.00 — µs 208 Data setup time 250.00 — ns 209 SDL/SCL rise time — 1.00 µs SPIMOSI (Input) SPICLK (CI=0) (Input) SPICLK (CI=1) (Input) SPIMISO (Output) 180 Data 181 182 msb lsb 181 177 182 175 179 SPISEL (Input) 174 Data msb lsb Undef 178 176 182 msb msb 172 173 173 171 170 181 |
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