MPC850EC datasheet(9/72 Pages) NXP

9 / 72 page

MPC850 PowerQUICC™ Integrated Communications Processor Hardware Specifications, Rev. 2

Freescale Semiconductor

Power Considerations

The average chip-junction temperature, TJ, in °C can be obtained from the equation:

TJ = TA + (P

D • θJA)(1)

where

= Ambient temperature,

°C

Input low voltage

VIL

GND

0.8

EXTAL, EXTCLK input high voltage

VIHC

0.7*(VCC)

VCC+0.3

Input leakage current, Vin = 5.5 V (Except TMS, TRST, DSCK

and DSDI pins)

Iin

—

100

µA

Input leakage current, Vin = 3.6V (Except TMS, TRST, DSCK

and DSDI pins)

IIn

—10

µA

Input leakage current, Vin = 0V (Except TMS, TRST, DSCK

and DSDI pins)

IIn

—10

µA

Input capacitance

Cin

—20

Output high voltage, IOH = -2.0 mA, VDDH = 3.0V

except XTAL, XFC, and open-drain pins

VOH

2.4

—

Output low voltage

CLKOUT 3

IOL = 3.2 mA 1

IOL = 5.3 mA 2

IOL = 7.0 mA PA[14]/USBOE, PA[12]/TXD2

IOL = 8.9 mA TS, TA, TEA, BI, BB, HRESET, SRESET

VOL

—

0.5

A[6:31], TSIZ0/REG, TSIZ1, D[0:31], DP[0:3]/IRQ[3:6], RD/WR, BURST, RSV/IRQ2, IP_B[0:1]/IWP[0:1]/VFLS[0:1],

IP_B2/IOIS16_B/AT2, IP_B3/IWP2/VF2, IP_B4/LWP0/VF0, IP_B5/LWP1/VF1, IP_B6/DSDI/AT0, IP_B7/PTR/AT3,

PA[15]/USBRXD, PA[13]/RXD2, PA[9]/L1TXDA/SMRXD2, PA[8]/L1RXDA/SMTXD2,

PA[7]/CLK1/TIN1/L1RCLKA/BRGO1, PA[6]/CLK2/TOUT1/TIN3, PA[5]/CLK3/TIN2/L1TCLKA/BRGO2,

PA[4]/CLK4/TOUT2/TIN4, PB[31]/SPISEL, PB[30]/SPICLK/TXD3, PB[29]/SPIMOSI /RXD3,

PB[28]/SPIMISO/BRGO3, PB[27]/I2CSDA/BRGO1, PB[26]/I2CSCL/BRGO2, PB[25]/SMTXD1/TXD3,

PB[24]/SMRXD1/RXD3, PB[23]/SMSYN1/SDACK1, PB[22]/SMSYN2/SDACK2, PB[19]/L1ST1,

PB[18]/RTS2/L1ST2, PB[17]/L1ST3, PB[16]/L1RQa/L1ST4, PC[15]/DREQ0/L1ST5, PC[14]/DREQ1/RTS2/L1ST6,

PC[13]/L1ST7/RTS3, PC[12]/L1RQa/L1ST8, PC[11]/USBRXP, PC[10]/TGATE1/USBRXN, PC[9]/CTS2,

PC[8]/CD2/TGATE1, PC[7]/USBTXP, PC[6]/USBTXN, PC[5]/CTS3/L1TSYNCA/SDACK1, PC[4]/CD3/L1RSYNCA,

PD[15], PD[14], PD[13], PD[12], PD[11], PD[10], PD[9], PD[8], PD[7], PD[6], PD[5], PD[4], PD[3]

BDIP/GPL_B5, BR, BG, FRZ/IRQ6, CS[0:5], CS6/CE1_B, CS7/CE2_B, WE0/BS_AB0/IORD, WE1/BS_AB1/IOWR,

WE2/BS_AB2/PCOE, WE3/BS_AB3/PCWE, GPL_A0/GPL_B0, OE/GPL_A1/GPL_B1,

GPL_A[2:3]/GPL_B[2:3]/CS[2:3], UPWAITA/GPL_A4/AS, UPWAITB/GPL_B4, GPL_A5, ALE_B/DSCK/AT1,

OP2/MODCK1/STS, OP3/MODCK2/DSDO

3 The MPC850 IBIS model must be used to accurately model the behavior of the Clkout output driver for the full and

half drive setting. Due to the nature of the Clkout output buffer, IOH and IOL for Clkout should be extracted from the

IBIS model at any output voltage level.

Table 5. DC Electrical Specifications (continued)

Characteristic

Symbol

Min

Max

Unit

MPC850EC Datasheet(PDF) 9 Page - NXP Semiconductors

MPC850EC Datasheet(HTML) 9 Page - NXP Semiconductors

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72

Datasheet Download

Link URL