MMPF0200 datasheet(38/115 Pages) NXP

38 / 115 page

NXP Semiconductors

PF0200

FUNCTIONAL BLOCK REQUIREMENTS AND BEHAVIORS

Table 40. SW1A/B register summary

Address

Output

SW1ABVOLT

0x20

SW1AB Output voltage set point in normal operation

SW1ABSTBY

0x21

SW1AB Output voltage set point on Standby

SW1ABOFF

0x22

SW1AB Output voltage set point on Sleep

SW1ABMODE

0x23

SW1AB Switching Mode selector register

SW1ABCONF

0x24

SW1AB DVS, Phase, Frequency and ILIM configuration

Table 41. Register SW1ABVOLT - ADDR 0x20

Name

Bit #

R/W

Default

Description

SW1AB

5:0

R/W

0x00

Sets the SW1AB output voltage during normal

operation mode. See Table 39 for all possible

configurations.

UNUSED

7:6

–

0x00

UNUSED

Table 42. Register SW1ABSTBY - ADDR 0x21

Name

Bit #

R/W

Default

Description

SW1ABSTBY

5:0

R/W

0x00

Sets the SW1AB output voltage during Standby

mode. See Table 39 for all possible

configurations.

UNUSED

7:6

–

0x00

UNUSED

Table 43. Register SW1ABOFF - ADDR 0x22

Name

Bit #

R/W

Default

Description

SW1ABOFF

5:0

R/W

0x00

Sets the SW1AB output voltage during Sleep

mode. See Table 39 for all possible

configurations.

UNUSED

7:6

–

0x00

UNUSED

Table 44. Register SW1ABMODE - ADDR 0x23

Name

Bit #

R/W

Default

Description

SW1ABMODE

3:0

R/W

0x80

Sets the SW1AB switching operation mode.

See Table 29 for all possible configurations.

UNUSED

–

0x00

UNUSED

SW1ABOMODE

R/W

0x00

Set status of SW1AB when in Sleep mode

0 = OFF

1 = PFM

UNUSED

7:6

–

0x00

UNUSED

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