CS47L85 datasheet(212/370 Pages) CIRRUS

212 / 370 page

CS47L85

212

Rev 4.3

OUTPUT SIGNAL PATH DIGITAL VOLUME CONTROL

A digital volume control is provided on each of the output signal paths, providing -64dB to +31.5dB gain control in 0.5dB

steps. An independent mute control is also provided for each output signal path.

Whenever the gain or mute setting is changed, the signal path gain is ramped up or down to the new settings at a

programmable rate. For increasing gain (or un-mute), the rate is controlled by the OUT_VI_RAMP register. For decreasing

gain (or mute), the rate is controlled by the OUT_VD_RAMP register. Note that the OUT_VI_RAMP and OUT_VD_RAMP

registers should not be changed while a volume ramp is in progress.

The OUT_VU bits control the loading of the output signal path digital volume and mute controls. When OUT_VU is set to 0,

the digital volume and mute settings will be loaded into the respective control register, but will not actually change the signal

path gain. The digital volume and mute settings on all of the output signal paths are updated when a 1 is written to OUT_VU.

This makes it possible to update the gain of multiple signal paths simultaneously.

Note that, although the digital volume control registers provide 0.5dB steps, the internal circuits provide signal gain

adjustment in 0.125dB steps. This allows a very high degree of gain control, and smooth volume ramping under all operating

conditions.

The 0dBFS level of the OUT5/OUT6 digital output paths is not equal to the 0dBFS level of the CS47L85 digital core. The

maximum digital output level is -

6dBFS (see “Electrical Characteristics”). Under 0dBFS gain conditions, a 0dBFS output

from the digital core corresponds to a -6dBFS level in the PDM output.

The digital volume control register fields are described in Table 76 and Table 77.

ADDRESS

BIT

LABEL

DEFAULT

DESCRIPTION

R1033

(0409h)

Output_Vo

lume_Ram

6:4

OUT_VD_RAMP

[2:0]

010

Output Volume Decreasing Ramp Rate

(seconds/6dB)

000 = 0ms

001 = 0.5ms

010 = 1ms

011 = 2ms

100 = 4ms

101 = 8ms

110 = 15ms

111 = 30ms

This register should not be changed while

a volume ramp is in progress.

2:0

OUT_VI_RAMP

[2:0]

010

Output Volume Increasing Ramp Rate

(seconds/6dB)

000 = 0ms

001 = 0.5ms

010 = 1ms

011 = 2ms

100 = 4ms

101 = 8ms

110 = 15ms

111 = 30ms

This register should not be changed while

a volume ramp is in progress.

R1041

(0411h)

DAC_Digit

al_Volume

_1L

OUT_VU

Output Signal Paths Volume Update

Writing a 1 to this bit will cause the Output

Signal Paths Volume and Mute settings to

be updated simultaneously

OUT1L_MUTE

Output Path 1 (Left) Digital Mute

0 = Un-mute

1 = Mute

CS47L85 Datasheet(PDF) 212 Page - Cirrus Logic

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