AM2634 datasheet(63/164 Pages) TI

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6.4 Pin Connectivity Requirements

This section describes connectivity requirements for package balls that have specific connectivity requirements

and package balls that may be unused.

Note

All power balls must be supplied with the voltages specified in the Recommended Operating

Conditions section, unless otherwise specified in Signal Descriptions.

For additional clarification, "leave unconnected" or "no connect" (NC) mean no signal traces should be

connected to these device ball numbers.

Table 6-107. Pin Connectivity Requirements

BALL NUMBER

BALL NAME

PIN CONNECTIVITY REQUIREMENTS

SAFETY_ERRORn

Each of these balls must be connected to ground (VSS) through separate

external pull resistors to ensure they are held to a valid logic low level if a

PCB signal trace is connected and not actively driven by an attached device.

The internal pull-down may be used to hold a valid logic low level if no PCB

signal trace is connected to the ball.

TCK

TDI

TMS

Each of these balls must be connected to the corresponding power supply(1)

through separate external pull resistors to ensure these balls are held to

a valid logic high level if a PCB signal trace is connected and not actively

driven by an attached device. The internal pull-up may be used to hold a

valid logic high level if no PCB signal trace is connected to the ball.

A13

B13

I2C0_SCL

I2C0_SDA

Each of these balls must be connected to the corresponding power supply(1)

through separate external pull resistors to ensure these balls are held to a

valid logic high level.

A11

C10

QSPI0_D0 (SOP0)

QSPI0_D1

SPI0_CLK (SOP2)

SPI0_D0 (SOP3)

Each of these balls must be connected to the corresponding power supply(1)

or ground (VSS) through separate external pull resistors to ensure these

balls are held to a valid logic high or low level as appropriate to select the

desired device boot mode.

ADC ZCZ PIN

ADC[0:4]_AIN[0:5]

Any unused ADCx_AINy input ball for any ADC instance (ADC[0:4]_AIN[0:5])

must be connected (shorted) directly to ground (VSS).

U16

T15

ADC_CAL0

ADC_CAL1

If all ADCx_AINy inputs for all ADC instances (ADC[0:4]_AIN[0:5]) are not

used, the ADC_CAL[0:1] analog ball must be connected (shorted) directly to

ground (VSS).

VSYS_MON

If VSYS_MON is not used, this ball may be connected (shorted) directly to

ground (VSS).

LVCMOS ZCZ PIN

Any LVCMOS Voltage Buffer

If a pin has an associated IOMUX Pad Configuration Registration then the

ball may remain unconnected. After PORz, the LVCMOS voltage buffer is

configured to a default state compatible with an unconnected ball.

(1)

To determine which power supply is associated with any IO, see POWER column of the Pin Attributes table.

Note

Internal pull resistors are weak and may not source enough current to maintain a valid logic level for

some operating conditions. This may be the case when connected to components with leakage to the

opposite logic level, or when external noise sources couple to signal traces attached to balls which

are only pulled to a valid logic level by the internal resistor. Therefore, external pull resistors may be

required to hold a valid logic level on balls with external connections.

If balls are allowed to float between valid logic levels, the input buffer may enter a high-current state

which could damage the IO cell.

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AM2634, AM2634-Q1, AM2632, AM2632-Q1, AM2631, AM2631-Q1

SPRSP74C – OCTOBER 2022 – REVISED NOVEMBER 2022

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Product Folder Links: AM2634 AM2634-Q1 AM2632 AM2632-Q1 AM2631 AM2631-Q1

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