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AM2634 Datasheet(PDF) 95 Page - Texas Instruments

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Part # AM2634
Description  AM263x Sitara™ Microcontrollers
PDF  164 Pages
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Manufacturer  TI [Texas Instruments]
Direct Link  http://www.ti.com
Logo TI - Texas Instruments

AM2634 Datasheet(HTML) 95 Page - Texas Instruments

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7.11.5.5 Fast Serial Interface (FSI)
Note
The device has multiple FSI modules. FSIn is a generic prefix applied to FSI signal names, where n
represents the specific FSI module.
For more information, see Fast Serial Interface section in the device TRM.
FSI Timing Conditions
PARAMETER
MIN
MAX
UNIT
INPUT CONDITIONS
SRI
Input Slew Rate
0.8
4
V/ns
OUTPUT CONDITIONS
CL
Output Load Capacitance
1
7
pF
FSIRX Timing Requirements
NO.
PARAMETER
DESCRIPTION
MIN
MAX
UNIT
FSIR1
tc(RX_CLK)
Cycle time, FSIRXn_CLK
16.67
ns
FSIR2
tw(RX_CLK)
Pulse width, FSIRXn_CLK low or
FSIRXn_CLK high
0.35P(1) – 1
0.65P(1) + 1
ns
FSIR3
td(RX_D–RX_CLK)
Delay time, FSIRXn_D[0:1] valid before
FSIRXn_CLK
1.7
ns
FSIR4
th(RX_CLK–RX_D)
Hold time with respect to both edges of
FSIRXn_CLK
2
ns
(1)
P = Tc(RXCLK) = RX Interface clock period in ns.
FSI_RXn_CLK
FSIR2
FSIR1
FSIR3
FSI_RXn_D0
FSI_RXn_D1
FSIR4
FSIR2
Figure 7-22. FSI Timing Requirements
FSIRX Switching Characteristics
NO.
PARAMETER
DESCRIPTION
MIN
MAX
UNIT
FSIR5
td(RX_CLK)
FSIRXn_CLK delay compensation at
RX_DLYLINE_CTRL[RXCLK_DLY]=31
10
30
ns
FSIR6
td(RX_D0)
FSIRXn_D0 delay compensation at
RX_DLYLINE_CTRL[RXCLK_DLY]=31
10
30
ns
FSIR7
td(RX_D1)
FSIRXn_D1 delay compensation at
RX_DLYLINE_CTRL[RXCLK_DLY]=31
10
30
ns
FSIR8
td(DELAY_ELEMENT)
Incremental delay of each delay line
element for FSIRXn_CLK, FSIRXn_D0, and
FSIRXn_D1
0.3
1
ns
www.ti.com
AM2634, AM2634-Q1, AM2632, AM2632-Q1, AM2631, AM2631-Q1
SPRSP74C – OCTOBER 2022 – REVISED NOVEMBER 2022
Copyright © 2022 Texas Instruments Incorporated
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Product Folder Links: AM2634 AM2634-Q1 AM2632 AM2632-Q1 AM2631 AM2631-Q1



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