S12ECT16B8CV2 datasheet(103/152 Pages) NXP

103 / 152 page

MC9S12XDP512 Device User Guide — 9S12XDP512DGV1/D V01.12

details of the S12 LRAE and its implementation, please see the S12 LREA

Application Note (AN2546/D).

Section 24 EEPROM 4K Block Description

Consult the EETX4K Block Guide for information about the EEPROM module.

Section 25 XSRAM20K Block description

Consult the XSRAM20K Block Guide for information about the XSRAM20K module.

Section 26 MSCAN Block Description

There are five MSCAN modules (CAN4, CAN3, CAN2, CAN1 and CAN0) implemented on the

MC9S12XDP512. Consult the MSCAN Block Guide for information about the Motorola Scalable CAN

Module.

Section 27 Port Integration Module (PIM) Block Description

Consult the PIM_9XD Family Block Guide for information about the Port Integration Module.

Section 28 Voltage Regulator (VREG_3V3) Block

Description

Consult the VREG3V3 Block Guide for information about the dual output linear voltage regulator.

•

VREGEN is accessible externally

•

The API Trimming bits APITR[5:0] need to be set by the customer if accurate period is wanted.

28.1 Recommended PCB Layout

The PCB must be carefully laid out to ensure proper operation of the voltage regulator as well as of the

MCU itself. The following rules must be observed:

•

Every supply pair must be decoupled by a ceramic capacitor connected as near as possible to the

corresponding pins (C1 - C6).

•

Central point of the ground star for LQFP112/QFP80 should be the VSSR pin.

•

Central point of the ground star for LQFP144 should be the VSSA pin.

Freescale Semiconductor, Inc.

For More Information On This Product,

Go to: www.freescale.com

S12ECT16B8CV2 Datasheet(PDF) 103 Page - NXP Semiconductors