9.3 Power Supply Recommendations

The OPA814 is intended to operate on supplies ranging from 6 V to 12.6 V. The OPA814 supports single-supply,

split, balanced, and unbalanced bipolar supplies. When operating at supplies less than 8 V, consider the

input common-mode range of the amplifier. Under these supply conditions, the common-mode must be biased

appropriately for linear operation. Therefore, the limit to lower supply-voltage operation is the usable input

voltage range for the JFET-input stage.

9.4 Layout

9.4.1 Layout Guidelines

Achieving optimum performance with a high-frequency amplifier like the OPA814 requires careful attention to

board layout parasitics and external component types. Recommendations that optimize performance include the

following:

1. Minimize parasitic capacitance to any ac ground for all of the signal I/O pins. Parasitic capacitance on

the output and inverting input pins can cause instability. On the noninverting input, parasitic capacitance can

react with the source impedance to cause unintentional band-limiting. Ground and power metal planes act as

one of the plates of a capacitor, while the signal trace metal acts as the other separated by PCB dielectric.

To reduce this unwanted capacitance, minimize the routing of the feedback network. A plane cutout around

and underneath the inverting input pin on all ground and power planes is recommended. Otherwise, make

sure that ground and power planes are unbroken elsewhere on the board.

2. Minimize the distance (less than 0.25 inches) from the power-supply pins to high-frequency

decoupling capacitors. Use high-quality, 100-pF to 0.1-µF, C0G- and NPO-type decoupling capacitors.

These capacitors must have voltage ratings at least three times greater than the amplifiers maximum power

supplies to provide a low-impedance path to the amplifiers power-supply pins across the amplifiers gain

bandwidth specification. At the device pins, do not allow the ground and power plane layout to be in close

proximity to the signal I/O pins. Avoid narrow power and ground traces to minimize inductance between

the pins and the decoupling capacitors. Larger (2.2-µF to 6.8-µF) decoupling capacitors, effective at lower

frequencies, must be used on the supply pins. These larger capacitors can be placed further from the device

and shared among several devices in the same area of the PCB.

3. Careful selection and placement of external components preserves the high-frequency performance

of the OPA814. Use low-reactance resistors. Small form-factor, surface-mount resistors work best and allow

a tighter overall layout. The output pin and inverting input pin are the most sensitive to parasitic capacitance;

therefore, always position the feedback and series output resistor, if any, as close as possible to the inverting

input and the output pin, respectively.

Place other network components, such as noninverting input termination resistors, close to the package.

Even with a low parasitic capacitance at the noninverting input, high external resistor values can create

significant time constants that can degrade performance. When the OPA814 is configured as a conventional

voltage amplifier, keep the resistor values as low as possible and consistent with the load driving

considerations. Decreasing the resistor values keeps the resistor noise terms low and minimizes the effect of

the parasitic capacitance. However, lower resistor values increase the dynamic power consumption because

RF and RG become part of the output load network of the amplifier.

OPA814

SBOSA14 – APRIL 2023

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