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INA700 Datasheet(PDF) 33 Page - Texas Instruments

Part # INA700
Description  INA700 40-V, 16-Bit, I2C Output Digital Power Monitor in WCSP with EZShunt™ Technology
PDF  43 Pages
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Manufacturer  TI [Texas Instruments]
Direct Link  http://www.ti.com
Logo TI - Texas Instruments

INA700 Datasheet(HTML) 33 Page - Texas Instruments

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9 Power Supply Recommendations
The input circuitry of the device can accurately measure signals on common-mode voltages beyond the power-
supply voltage, VS. For example, the voltage applied to the VS power supply terminal can be 5 V, whereas the
load power-supply voltage being monitored (the common-mode voltage) can be as high as 40 V. Note that the
device can also withstand the full 0 V to 40 V range at the input terminals, regardless of whether the device has
power applied or not. Avoid applications where the GND pin is disconnected while device is actively powered.
Place the required power-supply bypass capacitors as close as possible to the supply and ground terminals of
the device. A typical value for this supply bypass capacitor is 0.1 µF. Applications with noisy or high-impedance
power supplies may require additional decoupling capacitors to reject power-supply noise.
10 Layout
10.1 Layout Guidelines
A layout that maximizes the thermal conduction from the IN– and IN+ pads is essential when sensing high load
currents. The area of the thermal planes connecting to these pads should be maximized, filling any available
area, while located as close as possible to the device. Thermal vias should generously be used and be placed
as close as possible to the IN– and IN+ pads to maximize thermal conduction to the bottom and available
internal layers. To achieve the best thermal performance, both the bottom and available internal layers should
be used to conduct the heat away from the device. See the INA700EVM User's Guide for more information on
best via and power plane placement in a multilayer design. Place the power-supply bypass capacitor as close as
possible to the supply and ground pins.
10.2 Layout Example
IN+
IN-
SDA
A0
GND
SCL
ALERT
VS
I
2C Bus Connections
ALERT, SDA, and SCL require external
pull-up resistors to the digital supply
voltage. The layout of these resistors
have been omitted and are not as
critical to the device performance.
CBYPASS
Supply Voltage
2.7 V to 5.5 V
VIA to GND plane
Thermal Vias to bottom and internal
layers for device heat sinking
Device address pin must be connected
to either GND, SCL, SDA, or VS to
select the desired address.
Connect to VBUS for
high-side sensing or to
ground side of the load
for low side sensing
Connect to supply side of
the load for high-side
sensing or to ground for
low side sensing
Figure 10-1. INA700 Layout Example
www.ti.com
INA700
SBOSAB4 – MAY 2023
Copyright © 2023 Texas Instruments Incorporated
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Product Folder Links: INA700



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